18-447 Course Schedule, Spring 2023
Reading assignments are to be completed BEFORE coming to class. (P&H=Computer Organization and Design RISC-V Edition: The Hardware Software Interface, 2nd Edition by Patterson and Hennessy, Morgan Kaufmann/Elsvier.) There will be additional assigned readings from research papers.
- Part 1: L1~L12 Microrocessors
- Part 2: L13~L19 Memory and I/O
- Part 3: L20~L25 Parallel
If interested, see go to Spring 2009 Lecture Notes for lectures (L2, L3, L4) on computer arithmetic.
We covered interconnect in previous 15-week semesters.
(Go to the Course Home Page)
(Go to Canvas)
(Go to Superscalar Club)
You can preview lecture notes from Spring 2022 before class.
| Week | Date | L# | Topic | Readings | Lab Week | HW |
|---|---|---|---|---|---|---|
| 1 | 1/16 | MLK Day (No Classes) | No lab or office hours in week 1 | |||
| 1/18 | L3 | RISC-V RV32I ISA | P&H Ch2 | Lab 1A/B start | ||
| 2 | 1/23 | L4 | Single-Cycle Implementation | P&H 4.1~4.4 | HW1 out | |
| 1/25 | L1 | Introduction | P&H 1 | |||
| 3 | 1/30 | L2 | ISA Design | P&H Ch2 | Lab 1A due | |
| 2/1 | L5 | Performance | P&H 1.6~1.9 | |||
| 4 | 2/6 | L6 | Multi-Cycle Implementations | P&H 4.5, Appendix C | Lab 1B due | HW1 due HW2 out |
| 2/8 | L7 | Pipelining: Basics | P&H 4.6~4.7 | |||
| 5 | 2/13 | L8 | Pipelining: Data Hazard and Resolution | P&H 4.8 | Lab 2 start | |
| 2/15 | Guest Lecture: Datacenter Computing by Prof. Sriraman | |||||
| 6 | 2/20 | L9 | Pipelining: Control Hazard and Resolution | P&H 4.9 | mid-Lab 2 check-off | HW2 due HW3 out |
| 2/22 | L10 | Pipelining: Branch Prediction | P&H 4.9 | |||
| 7 | 2/27 | L11 | Pipelining: Exceptions | P&H 4.10 and rest | Lab 2 due | |
| 3/1 | L12 | Power and Energy | ||||
| Spring Break | Spring Break (No Classes) | |||||
| 8 | 3/13 | L13 | Busses and I/O | P&H 6.10 | Lab 3 start | |
| 3/15 | L14 | Memory Technology and Organization | P&H 5.1, 5.2 | HW3 due | ||
| 9 | 3/20 | Midterm covering Lecture 1~12 | ||||
| 3/22 | L15 | Caches | P&H 5.3, 5.4 | |||
| 10 | 3/27 | L16 | More caches | P&H 5.9, 5.13 | Lab 3 due | HW4 out |
| 3/29 | L17 | VM: protection and paging | P&H 5.6~5.8 | |||
| 11 | 4/3 | L18 | VM: page tables and TLB | P&H 5.6~5.8 | Lab 4 start | |
| 4/5 | L19 | VM: survey of systems and security challenges | Rest of Ch5 and paper | |||
| 12 | 4/10 | L20 | ILP to multicore | HW4 due HW5 out |
||
| 4/12 | L21 | Parallel Computer Architecture | P&H Ch6 | |||
| 13 | 4/17 | L22 | Multithreaded Programming | |||
| 4/19 | L23 | Parallel Performance | P&H 5.15 | |||
| 14 | 4/24 | L24 | Cache Coherence | P&H 5.10 | Lab 4 due | |
| 4/26 | L25 | Synchronization | P&H 2.11, 5.14 | |||
| 4/28 | HW5 due | |||||
| Finals week | TBD | Final Exam |
