18-447 Introduction to Computer Architecture, Spring 2023

• 18-447 no longer has SIO scheduled lab sections. However, TAs will host attendance-not-required “help sections” on Tuesdays 10:10am~1pm and Thursdays 1:25pm~4:15 in priority-reserved HH1305.
• I highly recommend that everyone review RTL Verilog at HDLBits before start of term.
• The textbook is Computer Organization and Design RISC-V 2nd Edition. We do follow the textbook.
• Please check Canvas for up-to-date announcements during the term.
• IEEE Micro Special Issue on the 50th anniversary of the birth of microprocessors

• Current semester: Spring 2023 Lecture Schedule and Notes
• Preview lecture notes from the last completed semester
• Go to Canvas for announcements and handouts
• Go to Piazza for Q&A
• Superscalar Club
• HKN Survival Guide (Caveats as of 4/1/2022: (1) Whoever wrote it apparently stopped attending after Lecture 9. 18-447 is decidedly not ONLY about microprocessors or RISC-V. (2) The course is rated 9 on exam difficulty. The B/C cut-off is set at class average. Historically, the exams have yielded “normal” bell curves, and one only need to score over ~60% of the points to get a “B” on the exams. You can find actual stats from last year in last year's lecture notes. Does that mean 18447 exams are “hard” or “easy”?)

Computer architecture is the science and art of selecting and interconnecting hardware components to create a computer that meets functional, performance and cost goals. This course introduces the basic principles and hardware structures of a modern programmable computer. We will learn, for example, how to design the control and datapath for a pipelined RISC processor and how to design fast memory and storage systems. The principles presented in lecture are reinforced in the laboratory through design and simulation of a register transfer (RT) implementation of a RISC processor pipeline in Verilog.

Prerequisites: (18240) and (15213 or 18213) and (18320 or 18330 or 18340 or 18341 or 18344 or 18349)

See Canvas for contact info and office hours

• Instructor
  • James C. Hoe
• Teaching Assistants
  • Esther Bedoyan
  • Christopher Bernard
  • James Nguyen
  • Jon Recta
  • Simon Yu
• 18-447 Top Guns

Please see Canvas.

• Lecture: MW, 12:20PM to 02:10PM, HH-B131

• Computer Organization and Design RISC-V Edition: The Hardware Software Interface, 2nd Edition by Patterson and Hennessy, Morgan Kaufmann. (Required)
• Synthesis Lectures on Computer Architecture at Morgan and Claypool (free access from CMU subnet)
• Also useful, textbooks from 18-240 and 15/18-213

• Computer Architecture Lab at Carnegie Mellon (CALCM)
• RISC-V Foundation
• HDLBits Verilog Practice
• 18-447 Spring 2015 archive (Prof. Onur Mutlu with superscalar)
• Spring 2009 Lecture Notes (archived “classic” edition with computer arithmetic without parallel architecture)
• Superscalar Club