18-447 Course Schedule, Spring 2021 (**Not Most Recent**)

Reading assignments are to be completed BEFORE coming to class. (P&H=Computer Organization and Design RISC-V Edition: The Hardware Software Interface, 2nd Edition by Patterson and Hennessy, Morgan Kaufmann/Elsvier.) You may also find it helpful to preview lecture notes from Spring 2020 before class. There will be additional assigned readings from research papers.

(If interested, go to Spring 2009 Lecture Notes for lectures (L2, L3, L4) on computer arithmetic)

(Go to the Course Home Page)

(Go to Canvas)


Week Date L# Topic Readings Lab Week
1 2/1 L1 Introduction P&H Ch1 No TA office hours
this week
2/3 L2 RISC-V RV32I ISA P&H Ch2 Lab 1A/B start
2 2/8 L3 Single-Cycle Implementation P&H 4.1~4.4
2/10 L4 ISA Design P&H Ch2
3 2/15 L5 Performance P&H 1.6~1.9 Lab 1A due
2/17 L6 Multi-Cycle Implementations P&H 4.5, Appendix C
4 2/22 L7 Pipelining: Basics P&H 4.6~4.7 Lab 1B due
2/24 L8 Pipelining: Data Hazard and Resolution P&H 4.8
5 3/1 L9 Pipelining: Control Hazard and Resolution P&H 4.9 Lab 2 start
3/3 L10 Pipelining: Branch Prediction P&H 4.9
6 3/8 L11 Pipelining: Exceptions P&H 4.10 and rest mid-Lab 2 check-off
3/10 Midterm 1 in Class
7 3/15 L12 Power and Energy Lab 2 due
3/17 L13 Busses and I/O P&H 6.10
8 3/22 L14 Memory Technology and Organization P&H 5.1, 5.2 Lab 3 start
3/24 L15 Caches P&H 5.3, 5.4
9 3/29 L16 More caches P&H 5.9, 5.13
3/31 L17 VM: protection and paging P&H 5.6~5.8
10 4/5 Break Day; No Classes Lab 3 due
4/7 L18 VM: page tables and TLB P&H 5.6~5.8
11 4/12 L19 VM: survey of systems and security challenges Rest of Ch5 and paper Lab 4 start
4/14 Midterm 2 in class
4/16 Spring Carnival
12 4/19 L20 ILP to multicore
4/21 L21 Parallel Computer Architecture P&H Ch6
13 4/26 L22 Multithreaded Programming Lab 4 status check
4/28 L23 Parallel Performance P&H 5.15
14 5/3 L24 Cache Coherence P&H 5.10 Lab 4 due
5/5 L25 Synchronization P&H 2.11, 5.14
5/11 Midterm 3 during final period; see Canvas


Omitted in 2021

Week Date L# Topic Readings Lab Week
L26 Interconnect
L27 Hardware Acceleration