Computer architecture is the science and art of selecting and interconnecting hardware components to create a computer that meets functional, performance and cost goals. This course introduces the basic principles and hardware structures of a modern programmable computer. We will learn, for example, how to design the control and datapath for a pipelined RISC processor and how to design fast memory and storage systems. The principles presented in lecture are reinforced in the laboratory through design and simulation of a register transfer (RT) implementation of a RISC processor pipeline in Verilog.
Prerequisites: 18-240 and (15-213 or 18-243) and (18340 or 18341 or 18348 or 18349 or 18320)
- Course Administrative Assistant
- Teaching Assisntants
- Peter Klemperer (Head TA)
- Benson Tsai
- Joshua Wise
- Lecture: MW, 12:30PM to 02:20PM, DH A310
- Lab Section A: T, 01:30PM to 04:20PM, WEH 3716
- Lab Section B: F, 10:30AM to 01:20PM, WEH 3716
Note: you can get checked off during either section period.
- Computer Organization and Design: The Hardware/Software Interface, Fourth Edition by Patterson and Hennessy, Morgan Kaufmann/Elsvier. (Required)
- Also useful, textbooks from 18-240 and 18-243