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Digital Signal Processing Hardware

This research develops a domain-specific hardware synthesis framework for digital signal processing (DSP) computations. By incorporating domain-specific knowledge of mathematics and algebra into a synthesis tool, the proposed framework can manipulate a math-level transform description to optimize a DSP transform implementation at the algorithmic and architectural design level. This research is affiliated with the SPIRAL project. This research is supported by the DARPA PERFECT program. This research has been supported in the past in part by an NSF ITR Award, the DARPA DESA program and C2S2 FCRP.

  • Students
  • Efficient Memory Accesses
    • Fazle Sadi, Joe Sweeney, Scott McMillan, Tze Meng Low, James C. Hoe, Larry Pileggi, Franz Franchetti. PageRank Acceleration for Large Graphs with Scalable Hardware and Two-Step SpMV. IEEE High Performance Extreme Computing Conference (HPEC), September 2018. (pdf)
    • Berkin Akin, Franz Franchetti, James C. Hoe. HAMLeT Architecture for Parallel Data Reorganization in Memory. IEEE Micro Near-Data Processing Special Issue, Jan/Feb 2016 (ieee)
    • Qi Guo, Tze Men Low, Nikos Alachiotis, Berkin Akin, Larry Pileggi, James C. Hoe, Franz Franchetti. Enabling Portable Energy Efficiency with Memory Accelerated Library. Proc. ACM/IEEE International Symposium on Microarchitecture (MICRO), December 2015. (pdf)
    • Berkin Akin. A Formal Approach to Memory Access Optimization: Data Layout, Reorganization, and Near-Data Processing. PhD Thesis, August 2015 (pdf)
    • Berkin Akin, Franz Franchetti, James C. Hoe. FFTs with Near-Optimal Memory Access Through Block Data Layouts: Algorithm, Architecture and Design Automation. Journal of Signal Processing Systems, June 2015. (springer)
    • Berkin Akin, Franz Franchetti, James C. Hoe. Data reorganization in memory using 3D-stacked DRAM. Proc. International Symposium on Computer Architecture (ISCA), June 2015. (pdf)
    • Fazle Sadi, Berkin Akin, Doru Popovici, James C. Hoe, Larry Pileggi, and Franz Franchetti. Algorithm/Hardware Co-optimized SAR Image Reconstruction with 3D-stacked Logic in Memory. Proc. High Performance Extreme Computing Conference (HPEC), September 2014. (pdf)
    • Berkin Akin, James C. Hoe, and Franz Franchetti. HAMLeT: Hardware Accelerated Memory Layout Transform within 3D-stacked DRAM. Proc. High Performance Extreme Computing Conference (HPEC), September 2014. (pdf)
    • Berkin Akin, Franz Franchetti, and James C. Hoe. Understanding the Design Space of DRAM-Optimized Hardware FFT Accelerators. Proc. International Conference on Application-specific Systems, Architectures and Processors (ASAP), June 2014. (pdf)
    • Berkin Akin, Franz Franchetti, and James C. Hoe. FFTs with Near-Optimal Memory Access Through Block Data Layouts. Proc. International Conference on Acoustics, Speech, and Signal Processing (ICASSP), May 2014. (pdf)
    • Q. Zhu, B. Akin, H.E. Sumbul, F. Sadi, J.C. Hoe, L. Pileggi, F. Franchetti. A 3D-stacked logic-in-memory accelerator for application-specific data intensive computing. Proc. International 3D Systems Integration Conference (3DIC), October 2013. (pdf)
    • Berkin Akin, Peter A. Milder, Franz Franchetti and James C. Hoe. Memory Bandwidth Efficient Two-Dimensional Fast Fourier Transform Algorithm and Implementation for Large Problem Sizes. Proc. International Symposium on Field-Programmable Custom Computing Machines (FCCM), April 2012. (pdf)
  • Linear Transform Kernels
    • Computer Generation of Hardware for Digital Signal Processing Transforms. Peter A. Milder, Franz Franchetti, James C. Hoe, and Markus Püschel. ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 17 Issue 2, April 2012. (acm)
    • A Mathematical Approach for Compiling and Optimizing Hardware Implementations of DSP Transforms. Peter A. Milder. PhD Thesis, August 2011 (pdf)
    • Hardware Implementation of the Discrete Fourier Transform with Non-Power-of-Two Problem Size. P. Milder, F. Franchetti, J. C. Hoe, and M. Pueschel. International Conference on Acoustics, Speech, and Signal Processing (ICASSP), March 2010. (pdf)
    • Automatic Generation of Streaming Datapaths for Arbitrary Fixed Permutations. P. A. Milder, J. C. Hoe and M. Pueschel. Design, Automation and Test in Europe (DATE), April 2009. (pdf)
    • Permuting Streaming Data Using RAMs. M. Pueschel, P. A. Milder and J. C. Hoe. Journal of the ACM (JACM), Volume 56 , Issue 2, April 2009. (acm)
    • Formal Datapath Representation and Manipulation for Implementing DSP Transforms. P. A. Milder, F. Franchetti, J. C. Hoe, M. Pueschel. Design Automation Conference (DAC), June 2008. (pdf)
    • Time-Multiplexed Multiple Constant Multiplication. P. Tummeltshammer, J. C. Hoe, and M. Pueschel. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Volume 26, Number 9, September 2007. (ieee)
    • Generating FPGA-Accelerated DFT Libraries. P. D'Alberto, F. Franchetti, P. A. Milder, A. Sandryhaila, J. C. Hoe, J. Johnson, J. M. F. Moura and M. Pueschel. Symposium on Field-Programmable Custom Computing Machines (FCCM), April 2007. (pdf)
    • Spiral: Joint Runtime and Energy Optimization of Linear Transforms. M. Telgarsky, J. C. Hoe, and J. Moura. International Conference on Acoustics, Speech, and Signal Processing (ICASSP), May 2006. (pdf)
    • Fast and Accurate Resource Estimation of Automatically Generated Custom DFT IP Cores. P. Milder, M. Ahmad, J. C. Hoe, and M. Pueschel. International Symposium on Field Programmable Gate Arrays (FPGA), February 2006. (pdf and try out the tool dftgen)
    • Automatic Generation of Customized Discrete Fourier Transform IPs. G. Nordin, P. Milder, J. C. Hoe, and M. Pueschel. Design Automation Conference (DAC), June 2005. (pdf and try out the tool dftgen)
    • Custom Optimized Multiplierless Implementations of DSP Algorithms. M. Pueschel, A. Zelinski, and J. C. Hoe. International Conference on Computer Aided Design (ICCAD), November 2004. (pdf)
    • Multiple Constant Multiplication by Time Multiplexed Mapping of Addition Chains. P. Tummeltshammer, J. C. Hoe, and M. Pueschel. Design Automation Conference (DAC), June 2004. (pdf)
    • Automatic Cost Minimization for Multiplierless Implementations of Discrete Signal Transforms. A. Zelinski, M. Pueschel, S. Misra, and J. C. Hoe. International Conference on Acoustics, Speech, and Signal Processing (ICASSP), May 2004. (pdf)
  • OFDM
    • Improving Fixed-Point Accuracy of FFT cores in O-OFDM Systems. Robert Koutsoyannis, Peter A. Milder, Christian Berger, Madeleine Glick, James C. Hoe, and Markus Pueschel. Proc. International Conference on Acoustics, Speech, and Signal Processing (ICASSP), March 2012.
    • Dependence of Optical OFDM Transceiver ASIC Compexity on FFT Size. Rachid Bouziane, Peter A. Milder, Robert Koutsoyannis, Yannis Benlachtar, James C. Hoe, Madeleine Glick, and Robert I. Killey. Proc. Optical Fiber Conference (OFC), March 2012.
    • Design and Simulation of 25 Gb/s Optical OFDM Transceiver ASICs. Peter A. Milder, Rachid Bouziane, Robert Koutsoyannis, Christian R. Berger, Yannis Benlachtar, Robert I. Killey, Madeleine Glick, and James C. Hoe. Optics Express, Volume. 19, Issue 21, pp. B337-B342, 2011. (Special Issue: European Conference on Optical Communication 2011 Focus Issue)
    • Design Studies for ASIC Implementations of 28 GS/s Optical QPSK- and 16-QAM-OFDM Transceivers. Rachid Bouziane, Peter A. Milder, Robert Koutsoyannis, Yannis Benlachtar, Christian R. Berger, James C. Hoe, Markus Püschel, Madeleine Glick, and Robert I. Killey. Optics Express, Volume 19, Issue 21, pp 20857-20864, October 2011.
    • Optimizing FFT Precision in Optical OFDM Transceivers. Rachid Bouziane, Robert Koutsoyannis, Peter A. Milder, Yannis Benlachtar, James C. Hoe, Markus Püschel, Madeleine Glick, and Robert I. Killey, IEEE Photonics Technology Letters, Voloume 23, Number 20, pp 1550-1552, October 2011.
    • Design and Simulation of 25 Gb/s Optical OFDM Transceiver ASICs. Peter A. Milder, Rachid Bouziane, Robert Koutsoyannis, Christian R. Berger, Yannis Benlachtar, Robert I. Killey, Madeleine Glick, and James C. Hoe. Proc. European Conference on Optical Communication (ECOC), September 2011.
    • Real-Time Digital Signal Processing for the Generation of Optical Orthogonal Frequency Division Multiplexed Signals. Y. Benlachtar, P. M. Watts, R. Bouziane, P. A. Milder, R. J. Koutsoyannis, J. C. Hoe, M. Püschel, M. Glick, and R. I. Killey. IEEE Journal of Selected Topics in Quantum Electronics, Volume 16, Number 5, September 2010.
    • Design Studies for an ASIC Implementation of an Optical OFDM Transceiver. R. Bouziane, P. A. Milder, R. J. Koutsoyannis, Y. Benlachtar, C. R. Berger, J. C. Hoe, M. Püschel, M. Glick, and R. I. Killey. Proc. European Conference and Exhibition on Optical Communication (ECOC), September 2010.
    • Real-Time FPGA-Based 21.4GS/s Optical OFDM Transmitter. Y. Benlachtar, P. M. Watts, R. Bouziane, P. A. Milder, D. Rangaraj, A. Cartolano, R. Koutsoyannis, J. C. Hoe, M. Püschel and R. I. Killey. Optics Express, Volume 17, Issue 20, pp.17658-17668, September 2009.
    • 21.4 GS/s Real-Time DSP-Based Optical OFDM Signal Generation and Transmission Over 1600 km of Uncompensated Fibre. Y. Benlachtar, P. M. Watts, R. Bouziane, P. Milder, R. Koutsoyannis, J. C. Hoe, M. Püschel, M. Glick and R. I. Killey. European Conference and Exhibition on Optical Communication Conference, September 2009. (Post Deadline Session)
  • Image Processing
    • Highly Efficient Performance Portable Tracking of Evolving Surfaces. Wei Yu, Franz Franchetti, and James C. Hoe. Proc. International Parallel and Distributed Processing Symposium (IPDPS), May 2012. (pdf)
    • Performance Portable Tracking of Evolving Surfaces. Wei Yu. PhD Thesis, May 2011 (pdf)
    • High Performance Stereo Vision Designed for Massively Data Parallel Platforms. W. Yu, T. Chen, F. Franchetti, and J. C. Hoe. IEEE Transactions on Circuits and Systems for Video Technology, Volume 20, Number 11, November 2010. (ieee)
    • Fast Bilateral Filtering by Adapting Block Size. W. Yu, F. Franchetti, J. C. Hoe, Y.-J. Chang, T. Chen. Proc. International Conference on Image Processing (ICIP), September 2010. (pdf)
    • Real Time Stereo Vision Using Exponential Step Cost Aggregation on GPU. W. Yu, T. Chen, J. C. Hoe. International Conference on Image Processing (ICIP), November 2009. (pdf)