18-643 Reconfigurable Logic: Technology, Architecture and Applications

Announcements

  • When the course started in 2015, “RTL” was made a required experience. If you are skilled in high-performance parallel programming, you should do fine in 2022. (If you need an RTL refresher, go to HDLBits.
  • Recitation attendance is optional. Recitation provides supplemental help on labs and projects. We are likely to reschedule the time by a popularity vote come fall.
  • No recitation first two weeks of school
  • After the semester starts, students on waitlist should email the instructor to get temporary access to Canvas.

Course Description

Three decades since their original inception as a lower-cost compromise to ASICs, modern Field Programmable Gate Arrays (FPGAs) are versatile and powerful systems-on-a-chip for many applications that need both hardware level efficiency and the flexibility of reprogrammability. More recently, FPGAs have also emerged as a formidable computing substrate with applications ranging from data centers to mobile devices. This course offers a comprehensive coverage of modern FPGAs in terms of technology, architecture and applications. The coverage will also extend into on-going research investigations of future directions. Students will take part in a substantial design project applying the latest FPGA platforms to compute acceleration. Register-Transfer Level (RTL) hardware design experience is required.

Prerequisites: 18-341 or 18-447

Staff

Meetings

  • Lectures: Monday and Wednesday, 12:20pm to 2:10pm, TBD
  • Recitations: to be decided in fall

Textbooks

  • None required. Please see Canvas for supplemental reference materials.