Analytical Inverter-Based Distributed Generator Model for Power Flow Analysis

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N. T. Bandele, A. Pandey and L. Pileggi, Analytical Inverter-Based Distributed Generator Model for Power Flow Analysis, IEEE PES General Meeting, July 25-29, 2021.

Top-Down Synthesis of Soft eFPGA Fabrics Using Standard ASIC Flows

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P. Mohan, O. Atli, O. Kibar, M. Z. Vanaikar, L. Pileggi and K. Mai, “Top-Down Synthesis of Soft eFPGA Fabrics Using Standard ASIC Flows,” Government Microcircuit Applications and Critical Technology Conference (GOMACTech), March 29-April 1, 2021.

Split-Chip Design to prevent IP Reverse Engineering

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S. Pagliarini, J. Sweeney, K. Mai, S. Blanton, S. Mitra and L. Pileggi, “Split-Chip Design to prevent IP Reverse Engineering,” in IEEE Design & Test, doi: 10.1109/MDAT.2020.3033255.

Incremental Model Building Homotopy Approach for Solving Exact AC-Constrained Optimal Power Flow

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A. Pandey, A. Agarwal, L. Pileggi, “Incremental Model Building Homotopy Approach for Solving Exact AC-Constrained Optimal Power Flow,” Hawaii International Conference on System Sciences-54, Hawaii, 2021.

Top-down physical design of soft embedded FPGA fabrics

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P. Mohan, O. Atli, O. Kibar, M. Z. Vanaikar, L. Pileggi and K. Mai, “Top-down physical design of soft embedded FPGA fabrics,” In proceedings of FPGA conference, Feb-March 2021.

A Multiplexed Active Digital Implantable Neural Probe

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X. He, S. Liu, S. Kargarrazi, V. Chen, M. Chamanzar, L. Pileggi, “A Multiplexed Active Digital Implantable Neural Probe,” In proceedings of SfN Global Connectome (virtual conference), January 11-13, 2021.

Hardware Redaction via Designer-Directed Fine-Grained Soft eFPGA Insertion

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P. Mohan, O. Atli, O. Kibar, M. Z. Vanaikar, L. Pileggi and K. Mai, “Hardware Redaction via Designer-Directed Fine-Grained Soft eFPGA Insertion,” In proceedings of Design and Test in Europe (DATE), February 1-5, 2021.

Modeling Techniques for Logic Locking

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J. Sweeney, M.J.H. Heule, L. Pileggi, “Modeling Techniques for Logic Locking,” IEEE International Conference on Computer-Aided Design, November 2020.

A Circuit-Theoretic Approach to State Estimation

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S. Li, A. Pandey, S. Kar, L. Pileggi, “A Circuit-Theoretic Approach to State Estimation,” IEEE PES Innovative Smart Grid Technologies Europe (ISGT-Europe), October 2020.

Sensitivity Analysis of Locked Circuits

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Sweeney, M. J. H. Heule, and L. Pileggi. “Sensitivity Analysis of Locked Circuits,” 23rd International Conference on Logic for Programming, Artificial Intelligence and Reasoning (LPAR-23), May 2020.