Logic IP for Low-Cost IC Design in Advanced CMOS Nodes

M. Isgenc, M. Martins, S. Pagliarini and L. Pileggi, “Logic IP for Low-Cost IC Design in Advanced CMOS Nodes,” IEEE Transactions on Very Large Scale Integration, Vol 28, Issue 2, February 2020. (DOI:10.1109/TVLSI.2019.2942825.)

Steady-State Simulation for Combined Transmission and Distribution Systems

A. Pandey and L. Pileggi, “Steady-State Simulation for Combined Transmission and Distribution Systems,” in IEEE Transactions on Smart Grid, August 2019. (DOI: 10.1109/TSG.2019.2932403)

From Virtual Characterization to Test-Chips: DFM Analysis through Pattern Enumeration

S. Pagliarini, M. Isgenc, M. Martins and L. Pileggi, “From Virtual Characterization to Test-Chips: DFM Analysis through Pattern Enumeration,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol 39, Issue 2, February 2020. DOI (10.1109/TCAD.2018.2889772)

Chip-to-chip Authentication Method based on SRAM PUF and Public Key Cryptography

I. Karageorgos, M. Isgenc, S. Pagliarini, and L. Pileggi, Chip-to-chip Authentication Method based on SRAM PUF and Public Key Cryptography, Journal of Hardware and Systems Security, (DOI: 10.1007/s41635-019-00080-y).

Efficient SpMV operation for Large and Highly Sparse Matrices using Scalable Multi-way Merge Parallelization

F. Sadi , Joe Sweeney, T. M. Low, J. C. Hoe, L. Pileggi, F. Franchetti, “Efficient SpMV operation for Large and Highly Sparse Matrices using Scalable Multi-way Merge Parallelization,” IEEE/ACM International Symposium on Microarchitecture, October 2019.

A Probabilistic Synapse with Strained MTJs for Spiking Neural Networks

S. Pagliarini, S. Bhuin, M. Isgenc, A. Biswas, L. Pileggi, A Probabilistic Synapse with Strained MTJs for Spiking Neural Networks, IEEE Transactions on Neural Networks and Learning Systems, June 2019.

A Linear Formulation for Power System State Estimation including RTU and PMU Measurements

A. Jovicic, M. Jereminov, L. Pileggi, G. Hug, “A Linear Formulation for Power System State Estimation including RTU and PMU Measurements,” IEEE PES Innovative Smart Grid Technologies Europe Conference, 2019.

Robust Sequential Steady-State Analysis of Cascading Outages

A. Pandey, A. Agarwal, M. Jereminov, M.R. Wagner, D.M. Bromberg, L. Pileggi, “Robust Sequential Steady-State Analysis of Cascading Outages,” IEEE PES Innovative Smart Grid Technologies Europe Conference, 2019.

Implicitly Modeling Frequency Control with Power Flow

A. Agarwal, A. Pandey, M. Jereminov, L. Pileggi, “Implicitly Modeling Frequency Control with Power Flow,” IEEE PES Innovative Smart Grid Technologies Europe Conference, 2019.

Improving Voltage Profile of the Nigerian Power Grid

A. Pandey, A. Agarwal, M. Jereminov, B. Rawn, T. Nwachuku and L. Pileggi, “Improving Voltage Profile of the Nigerian Power Grid,” in Proc. IEEE PES/IAS PowerAfrica Conference, Abuja Nigeria, August 2019.