Virtual Characterization for Exhaustive DFM Evaluation of Logic Cell Libraries

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S. Pagliarini, M. Martins, L. Pileggi, “Virtual Characterization for Exhaustive DFM Evaluation of Logic Cell Libraries”, 18th International Symposium on Quality Electronic Design (ISQED), March 2017.

Evaluating the Benefits of a Relaxed BEOL Pitch for Deeply Scaled ICs

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M. Isgenc, S. Pagliarini, L. Pileggi, “Evaluating the Benefits of a Relaxed BEOL Pitch for Deeply Scaled ICs”, 18th International Symposium on Quality Electronic Design (ISQED), March 2017.

Exhaustive DFM evaluation of logic cell libraries via virtual characterization, IEEE/ACM Workshop on Variability Modeling and Characterization

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M. Isgenc, M. Martins, S. Pagliarini, L. Pileggi, “Exhaustive DFM evaluation of logic cell libraries via virtual characterization, IEEE/ACM Workshop on Variability Modeling and Characterization”, November 2016.

Technologies for Secure RFID Authentication of Medicinal Pills and Capsules

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R. Carley, G. Colak, L. Chomas, L. Pileggi and K. Mai, “Technologies for Secure RFID Authentication of Medicinal Pills and Capsules”, IEEE International Conference on RFID Technology and Applications (RFID-TA), September 2016.

On the Design of Phase Locked Loop Oscillatory Neural Networks: Mitigation of Transmission Delay Effects

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R. Shi, T. Jackson, B. Swenson, S. Kar and L. Pileggi, “On the Design of Phase Locked Loop Oscillatory Neural Networks: Mitigation of Transmission Delay Effects”, International Joint Conference on Neural Networks, July 2016.

Extended Statistical Element Selection: A Calibration Method for High Resolution in Analog/RF Designs

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R. Liu, J. Weldon and L. Pileggi, “Extended Statistical Element Selection: A Calibration Method for High Resolution in Analog/RF Designs”, Design Automation Conference (DAC 2016), June 2016.

Ultra-Compact Graphene Multigate Variable Resistor for Neuromorphic Computing

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M. Darwish, V. Calayir, L. Pileggi, J. Weldon, “Ultra-Compact Graphene Multigate Variable Resistor for Neuromorphic Computing”, IEEE Transactions on Nanotechnology, Vol. 15, No. 2, March 2016.

Enabling Portable Energy Efficiency with Memory Accelerated Library

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Q. Guo, T.-M. Low, N. Alachiotis, B. Akin, L. Pileggi, J.C. Hoe, F. Franchetti, “Enabling Portable Energy Efficiency with Memory Accelerated Library”, 48th Annual IEEE/ACM International Symposium on Microarchitecture, 2015.

Re-thinking Polynomial Optimization: Efficient Programming of Reconfigurable Radio Frequency (RF) Systems by Convexification

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F. Wang, S. Yin, M. Jun, X. Li, T. Mukherjee, R. Negi, L. Pileggi, “Re-thinking Polynomial Optimization: Efficient Programming of Reconfigurable Radio Frequency (RF) Systems by Convexification”, Asia and South Pacific Design Automation Conference, January 2016.

Exploiting Sub-20 nm CMOS Technology Challenges to Design Affordable SoCs

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K. Vaidyanathan, Q. Zhu, L. Liebmann, K. Lai, S. Wu, R. Liu, Y. Liu, A.J. Strojwas, and L. Pileggi, “Exploiting Sub-20 nm CMOS Technology Challenges to Design Affordable SoCs”, Journal of Micro/Nanolithography, J. Micro/Nanolith. MEMS MOEMS, 14(1), 011007, July 2015.