Metal-mask Configurable RF Integrated Circuits
Y. Xu and L. Pileggi, “Metal-mask Configurable RF Integrated Circuits”, GOMACTech-05 Technical Program, April 2005.
Y. Xu and L. Pileggi, “Metal-mask Configurable RF Integrated Circuits”, GOMACTech-05 Technical Program, April 2005.
H. Zheng, B. Krauter and L.T. Pileggi, “Electrical Modeling of Integrated-Package Power/Ground Distributions”, IEEE Design and Test, Volume: 20 Issue: 3, pp. 23-31, May-June 2003.
H. Zheng, B. Krauter, L. Pileggi, “On-Package Decoupling Optimization with Package Macromodels”, Int’l Custom Integrated Circuits Conference, Sept. 2003.
K.Y. Tong, V. Kheterapal, S. Rovner, H. Schmit, L. Pileggi, R. Puri, “Regular Logic Fabrics for a Via Patterned Gate Array (VPGA)”, Int’l Custom Integrated Circuits Conference, Sept. 2003.
A. Koorapaty, L. Pileggi, H. Schmit, “Heterogeneous Logic Block Architectures for Via-Patterned Programmable Fabrics”, International Conference on Field Programmable Logic and Applications, September 2003.
C. Patel, A. Cozzie, H. Schmit and L. Pileggi, “An Architecture Exploration of Via Patterned Gate Arrays”, Internation Symposium on Physical Design, April 2003.
A. Koorapaty, V. Chandra, K.Y. Tong, C. Patel, L. Pileggi and H. Schmit, “Heterogeneous Programmable Logic Block Architectures”, Design and Test in Europe Conference (DATE), March 2003.

Carnegie Mellon University
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5000 Forbes Avenue
Pittsburgh, PA 15213-3891 USA
pileggi@andrew.cmu.edu
Phone: 412-268-6774
