An Architecture Exploration of Via Patterned Gate Arrays
C. Patel, A. Cozzie, H. Schmit and L. Pileggi, “An Architecture Exploration of Via Patterned Gate Arrays”, Internation Symposium on Physical Design, April 2003.
Heterogeneous Programmable Logic Block Architectures
/0 Comments/in Conference, Integrated Circuits, Publications /by awpA. Koorapaty, V. Chandra, K.Y. Tong, C. Patel, L. Pileggi and H. Schmit, “Heterogeneous Programmable Logic Block Architectures”, Design and Test in Europe Conference (DATE), March 2003.
Contact
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Pittsburgh, PA 15213-3891 USA
pileggi@andrew.cmu.edu
Phone: 412-268-6774