Modeling of Statistical Element Selection Based Self-Healing Analog Circuits

G. Keskin, J. Proesel and L. Pileggi, “Modeling of Statistical Element Selection Based Self-Healing Analog Circuits”, Proceedings of the SRC Techcon Conference, September 2010.

 

Enabling Application-Specific Integrated Circuits on Limited Pattern Constructs

D. Morris, S. Rovner, L. Pileggi, A. Strojwas and K. Vaidyanathan, “Enabling Application-Specific Integrated Circuits on Limited Pattern Constructs”, IEEE Symposium on VLSI (Invited Presentation), June 2010.

Demonstrating the benefits of template-based design-technology co-optimization

L. Liebmann, J. Hibbeler, N. Hieter, L. Pileggi, M. Moe, T. Jhaveri, V. Rovner, “Demonstrating the benefits of template-based design-technology co-optimization”, SPIE Advanced Lithography Conference, February 2010.

An 8-bit Flash ADC using Statistical Element Selection

J. Proesel, G. Keskin and L. Pileggi, “An 8-bit Flash ADC using Statistical Element Selection”, Proceedings of the SRC Techcon Conference, September 2009.

An SRAM Design Framework for Deeply-Scaled CMOS

U. Arslan, J. Wang and L. Pileggi, “An SRAM Design Framework for Deeply-Scaled CMOS”, Proceedings of the SRC Techcon Conference, September 2009.

Economic Assessment of Lithography Strategies for the 22nm Technology Node

T. Jhaveri, A. J. Strojwas, L. Pileggi and V. Rovner, “Economic Assessment of Lithography Strategies for the 22nm Technology Node”, Proceedings of the SPIE/BACUS Symposium on Photomask Technology, September 2009.

OPC Simplification & Mask Cost Reduction using Regular Design Fabrics

Tejas Jhaveri, Andrzej Strojwas, Larry Pileggi & Vyacheslav Rovner, “OPC Simplification & Mask Cost Reduction using Regular Design Fabrics”, SPIE Advanced Lithography Conference, February 2009.

Ring Oscillators for Single Process-Parameter Monitoring

Bin Wan, Jian Wang, Gokce Keskin, and Lawrence T. Pileggi, “Ring Oscillators for Single Process-Parameter Monitoring”, IEEE Workshop on Test Structure Design for Variability Characterization, November 2008.

A 0.6-to-1V Inverter-Based 5-bit Flash ADC in 90nm Digital CMOS

J. Proesel and L. Pileggi, ‘A 0.6-to-1V Inverter-Based 5-bit Flash ADC in 90nm Digital CMOS’, Int’l Custom Integrated Circuits Conference, Sept. 2008.

Variation-Tolerant SRAM Sense-Amplifier Timing Using Configurable Replica Bitlines

U. Arslan, M. McCartney, M. Bhargava, X. Li, K. Mai and L. Pileggi, “Variation-Tolerant SRAM Sense-Amplifier Timing Using Configurable Replica Bitlines”, Int’l Custom Integrated Circuits Conference, Sept. 2008.