B. Sadhu, M.A. Ferriss, A.S. Natarajan, S. Yaldiz, J-O. Plouchart, A.V. Rylyakov, A. Valdes-Garcia, B.D. Parker, A. Babakhani, S. Reynolds, X. Li, L. Pileggi, R. Harjani, J. Tierno and D. Friedman, “A Linearized Low Noise VCO-Based PLL With Automatic Biasing”, IEEE Journal of Solid State Circuits (Invited), Volume 48 , Issue 5, May 2013.
D. Bromberg, D. Morris, L. Pileggi and J. Zhu, “All-Magnetic, Nonvolatile, Addressable Chainlink Memory”, IEEE Transactions on Magnetics, vol. 49, no. 7, 2013.
V. Sokalski, D. Bromberg, D. Morris, M. T. Moneck, E. Yang, L. Pileggi, and J-G. Zhu, “Naturally Oxidized FeCo as a Magnetic Coupling Layer for Electrically Isolated Read/Write Paths in mLogic”, IEEE Transactions on Magnetics, vol. 49, no. 7, 2013.
Q. Zhu, C. Berger, E. Turner, L. Pileggi and F. Franchetti, “Local Interpolation-based Polar Format SAR: Algorithm, Hardware Implementation and Design Automation”, Journal of Signal Processing Systems, 2012.
D. Bromberg, D. Morris, L. Pileggi, J.-G. Zhu, “Novel STT-MTJ device enabling all-metallic logic circuits”, IEEE Transactions on Magnetics, INTERMAG, 2012.
M. Althoff, A. Rajhans, B. Krogh, S. Yaldiz, X. Li, and L. Pileggi, “Formal Verification of Phase-Locked Loops Using Reachability Analysis and Continuization”, Communications of the ACM (invited paper), 2012.
Gokce Keskin, Jon Proesel and Larry Pileggi, “8-bit Flash ADC Design Based on Post-Manufacturing Statistical Element Selection”, IEEE Journal of Solid State Circuits (Invited), Volume 46 , Issue 8, May 2011.
Tejas Jhaveri, Vyacheslav Rovner, Lars Liebmann, Larry Pileggi, Andrzej Strojwas, Jason D. Hibbeler, “Design Technology Co-optimization for Predictive Technology Scaling Beyond Gratings, Invited Keynote Paper”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 29, no. 4, April 2010.
Xin Li, Jiayong Le, Mustafa Celik and Lawrence Pileggi, “Defining statistical timing sensitivity for logic circuits with large-scale process and environmental variations”, IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 27, no. 6, pp. 1041-1054, June 2008.
Xin Li, Yaping Zhan and Lawrence Pileggi, “Quadratic Statistical MAX Approximation for Parametric Yield Estimation of Analog/RF Integrated Circuits”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 27, no. 5, pp. 831-843, May 2008.
Carnegie Mellon University
Hamerschlag Hall, 2113
5000 Forbes Avenue
Pittsburgh, PA 15213-3891 USA
pileggi@andrew.cmu.edu
Phone: 412-268-6774