V. H-C. Chen and L. Pileggi, “A 69.5mW 20GS/s 6b Time-Interleaved ADC with Embedded Time-to-Digital Calibration in 32nm CMOS SOI”, Special Issue of the IEEE Journal on Solid State Circuits (Invited Paper), vol.49, no.12, pp.2891,2901, Dec. 2014.
S. Sun, F. Wang, S. Yaldiz, X. Li, L. Pileggi, A. Natarajan, M. Ferriss, J.-O. Plouchart, B. Sadhu, B. Parker, A. Valdes Garcia, M.A.T. Sanduleanu, J. Tierno, and D. Friedman, “Indirect Performance Sensing for On-Chip Self-Healing of Analog and RF Circuits”, IEEE Transactions on Circuits and Systems, vol.61, no.8, pp.2243,2252, Aug. 2014.
K. Vaidyanathan, R. Liu, L. Liebmann, K. Lai, A. Strojwas, L. Pileggi, “Design Implications of Extremely Restricted Patterning”, Journal of Micro/Nanolithography, MEMS, and MOEMS, Vol 13 (03), 2014.
C.Y. Wen, G. Slovin, J. Bain, E. Schlesinger, L. Pileggi and J. Paramesh, “A Phase-Change Via-Reconfigurable CMOS LC VCO”, IEEE Transactions on Electron Devices, Vol. 60, No. 12, pp 3979-3988, December 2013.
D.H. Morris, D.M. Bromberg, J-G. ZHU and L. Pileggi, “Spintronic Devices and Circuits for Low-Voltage Logic”, International Journal of High Speed Electronics and Systems Vol. 21, No. 1 (2012) 1250005.
B. Sadhu, M.A. Ferriss, A.S. Natarajan, S. Yaldiz, J-O. Plouchart, A.V. Rylyakov, A. Valdes-Garcia, B.D. Parker, A. Babakhani, S. Reynolds, X. Li, L. Pileggi, R. Harjani, J. Tierno and D. Friedman, “A Linearized Low Noise VCO-Based PLL With Automatic Biasing”, IEEE Journal of Solid State Circuits (Invited), Volume 48 , Issue 5, May 2013.
D. Bromberg, D. Morris, L. Pileggi and J. Zhu, “All-Magnetic, Nonvolatile, Addressable Chainlink Memory”, IEEE Transactions on Magnetics, vol. 49, no. 7, 2013.
V. Sokalski, D. Bromberg, D. Morris, M. T. Moneck, E. Yang, L. Pileggi, and J-G. Zhu, “Naturally Oxidized FeCo as a Magnetic Coupling Layer for Electrically Isolated Read/Write Paths in mLogic”, IEEE Transactions on Magnetics, vol. 49, no. 7, 2013.
Q. Zhu, C. Berger, E. Turner, L. Pileggi and F. Franchetti, “Local Interpolation-based Polar Format SAR: Algorithm, Hardware Implementation and Design Automation”, Journal of Signal Processing Systems, 2012.
D. Bromberg, D. Morris, L. Pileggi, J.-G. Zhu, “Novel STT-MTJ device enabling all-metallic logic circuits”, IEEE Transactions on Magnetics, INTERMAG, 2012.
Carnegie Mellon University
Hamerschlag Hall, 2113
5000 Forbes Avenue
Pittsburgh, PA 15213-3891 USA
pileggi@andrew.cmu.edu
Phone: 412-268-6774