Cost-Effective Smart Memory Implementation for Parallel Backprojection in Computed Tomography

Q. Zhu, L. Pileggi , F. Franchetti, “Cost-Effective Smart Memory Implementation for Parallel Backprojection in Computed Tomography”, VLSI-SoC, October 2012.

Statistical Design and Optimization for Adaptive Post-Silicon Tuning of MEMS Filters

F. Wang, G. Keskin, A. Phelps, J. Rotner, X. Li, G. Fedder, T. Mukherjee and L. Pileggi, “Statistical Design and Optimization for Adaptive Post-Silicon Tuning of MEMS Filters”, IEEE/ACM Design Automation Conference (DAC), 2012.

Novel STT-MTJ device enabling all-metallic logic circuits

D. Bromberg, D. Morris, L. Pileggi and J. Zhu, “Novel STT-MTJ device enabling all-metallic logic circuits”, International Magnetics Conference, May 2012.

Design and Manufacturability Tradeoffs in Unidirectional & Bidirectional Standard Cell Images in 14 nm

K. Vaidyanathan, S.H. NG, D. Morris, N. Lafferty, L. Liebmann, W. Huang, K. Lai, L. Pileggi, A.J. Strojwas, “Design and Manufacturability Tradeoffs in Unidirectional & Bidirectional Standard Cell Images in 14 nm”, SPIE Advanced Lithography Conference, February 2012.

Local Loops for Robust Inter-Layer Routing at Sub-20 nm Nodes

W. Huang, D. Morris, N. Lafferty, L. Liebmann, K. Vaidyanathan, K. Lai, L. Pileggi, A.J. Strojwas, “Local Loops for Robust Inter-Layer Routing at Sub-20 nm Nodes”, SPIE Advanced Lithography Conference, February 2012.

Center for Circuit and System Solutions (C2S2): Accomplishments and Future Challenges

L. Pileggi, “Center for Circuit and System Solutions (C2S2): Accomplishments and Future Challenges”, (Invited Paper) GOMACTech Technical Program, March 2012.

Polar Format Synthetic Aperture RADAR in Energy Efficient Application-Specific Logic-in-Memory

Q. Zhu, C.R. Berger, E. Turner, L. Pileggi, F. Franchetti, “Polar Format Synthetic Aperture RADAR in Energy Efficient Application-Specific Logic-in-Memory”, IEEE International Conference on Acoustics, Speech and Signal Processing, Kyoto Japan, March 2012.

Novel STT-MTJ device enabling all-metallic logic circuits

D. Bromberg, D. Morris, L. Pileggi, J.-G. Zhu, “Novel STT-MTJ device enabling all-metallic logic circuits”, IEEE Transactions on Magnetics, INTERMAG, 2012.

Formal Verification of Phase-Locked Loops Using Reachability Analysis and Continuization

M. Althoff, A. Rajhans, B. Krogh, S. Yaldiz, X. Li, and L. Pileggi, “Formal Verification of Phase-Locked Loops Using Reachability Analysis and Continuization”, Communications of the ACM (invited paper), 2012.

mLogic: Ultra-Low Voltage Logic Circuits with Non-Volatile Spintronic Devices

D. Morris, D. Bromberg, J. Zhu, and L. Pileggi, “mLogic: Ultra-Low Voltage Logic Circuits with Non-Volatile Spintronic Devices”, (Invited Paper) Workshop on Frontier Electronics, December 2011.