Skew Reduction in Clock Trees Using Wire Width Optimization
N. Menezes, S. Pullela, A. Balivada and L.T. Pillage, “Skew Reduction in Clock Trees Using Wire Width Optimization”, Proceedings Custom Integrated Circuits Conference, May 1993.
ETA: Electrical-Level Timing Analysis
/0 Comments/in Conference, Electronic Design Automation, Publications /by awpR. Brashear, D. Holberg, M.R. Mercer and L.T. Pillage, “ETA: Electrical-Level Timing Analysis”, Proceedings IEEE International Conference on Computer-Aided Design, November 1992.
AWE Macromodels for Incorporation in a Circuit Simulator
/0 Comments/in Conference, Electronic Design Automation, Publications /by awpS.Y. Kim, N. Gopal and L.T. Pillage, “AWE Macromodels for Incorporation in a Circuit Simulator”, Proceedings IEEE International Conference on Computer-Aided Design, November 1992.
Introduction to Electrical and Computer Engineering
/0 Comments/in Conference, Publications /by awpM. Becker, D. Beer, M.J. Gonzalez, C.M. Maziar, L.T. Pillage, M.D. Shermis, T.J. Wagner, G.L. Wise, “Introduction to Electrical and Computer Engineering”, Proceedings of the 1992 American Society on Engineering Education Annual Conference, November 1992
On the Stability of Moment Matching Approximations in Asymptotic Waveform Evaluation
/0 Comments/in Conference, Electronic Design Automation, Publications /by awpD. F. Anastasakis, N. Gopal, S.Y. Kim and L.T. Pillage, “On the Stability of Moment Matching Approximations in Asymptotic Waveform Evaluation”, Proceedings Design Automation Conference, June 1992.
Effects of RC-Interconnect in a Hierarchical Timing Analyzer
/0 Comments/in Conference, Electronic Design Automation, Publications /by awpC. Ratzlaff, S. Pullela and L.T. Pillage, “Effects of RC-Interconnect in a Hierarchical Timing Analyzer”, Proceedings Custom Integrated Circuits Conference, May 1992.
Non-Uniform Models for Transmission Line Analysis
/0 Comments/in Conference, Electronic Design Automation, Publications /by awpN. Gopal, E. Tuncer, D. Neikirk and L.T. Pillage, “Non-Uniform Models for Transmission Line Analysis”, IEEE Sponsored Topical Meeting on Electrical Performance of Electronic Packaging, April, 1992.
Evaluating RC Interconnect Using Moment Methods
/0 Comments/in Conference, Electronic Design Automation, Publications /by awpN. Gopal, D. Neikirk and L.T. Pillage, “Evaluating RC Interconnect Using Moment Methods” Proceedings IEEE International Conference on Computer-Aided Design, November 1991.
Constrained Approximation of Dominant Time Constants in RC Circuit Delay Models
/0 Comments/in Conference, Electronic Design Automation, Publications /by awpN. Gopal, C. Ratzlaff, L.T. Pillage, “Constrained Approximation of Dominant Time Constants in RC Circuit Delay Models”, Proceedings of the International Mathematics and Computation Symposium, (Invited Paper), July 1991.
RICE: Rapid Interconnect Circuit Evaluator
/0 Comments/in Conference, Electronic Design Automation, Publications /by awpC. Ratzlaff, N. Gopal, L.T. Pillage, “RICE: Rapid Interconnect Circuit Evaluator”, Proceedings Design Automation Conference, (Best Paper Award Nomination), June 1991.
Contact
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pileggi@andrew.cmu.edu
Phone: 412-268-6774