Some Conference and Invited Talks

For all conference talks, see my publications page.

• Onur Mutlu,
  "Memory Scaling: A Systems Architecture Perspective"
  Proceedings of the 5th International Memory Workshop (IMW), Monterey, CA, May 2013. Slides (pptx) (pdf)
  
• Onur Mutlu,
  "Scaling the Memory System in the Many-Core Era"
  Distinguished Lecture at the Institute of Computing Technology, Chinese Academy of Sciences, Beijing, China, June 2012.
  Also presented at various venues, 2012.
• Onur Mutlu,
  "Architecting and Exploiting Asymmetry in Multi-Core Architectures"
  Presented at various venues, 2011, 2012.
• Onur Mutlu,
  "Flash Correct-and-Refresh: Retention-Aware Error Management for Increased Flash Memory Lifetime"
  Presented at the 30th IEEE International Conference on Computer Design (ICCD), Montreal, Quebec, Canada, September 2012.
  PDF version

• Onur Mutlu,
  "Bottleneck Identification and Scheduling in Multithreaded Applications"
  Presented at the 17th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), London, UK, March 2012.
• Onur Mutlu,
  "Some Opportunities and Obstacles in Cross-Layer and Cross-Component (Power) Management"
  Presented at the NSF Workshop on Cross-Layer Power Optimization and Management (NSF CPOM), Los Angeles, CA, February 2012.
  Position paper
• Onur Mutlu,
  "Memory Systems in the Many-Core Era: Challenges, Opportunities, and Solution Directions"
  Joint Keynote Talk at ISMM (International Symposium on Memory Management) and MSPC (ACM Workshop on Memory System Performance and Correctness), San Jose, CA, June 5, 2011.
  Abstract Slides (pptx) Slides (pdf)
• Onur Mutlu,
  "Towards Practical Bufferless On-Chip Networks"
  Presented at various venues, 2011.
• Chris Fallin,
  "CHIPPER: A Low-Complexity Bufferless Deflection Router"
  Presented at the 17th International Symposium on High-Performance Computer Architecture (HPCA), San Antonio, TX, February 2011.
  
• Yoongu Kim,
  "Thread Cluster Memory Scheduling: Exploiting Differences in Memory Access Behavior"
  Presented at the 43rd International Symposium on Microarchitecture (MICRO), Atlanta, GA, December 2010.
  pdf
• Onur Mutlu,
  "PCM (NVM) as Main Memory: Opportunities and Challenges"
  Presented at the Carnegie Mellon Parallel Data Lab (PDL) Retreat, Bedford, PA, October 2010.
• Onur Mutlu,
  "Some Ideas for Instruction-Level Parallelism Research"
  CRA Workshop on Advancing Computer Architecture Research: What Now in Instruction-Level Parallelism Research, Seattle, WA, September 2010.
• Onur Mutlu,
  "Research Challenges in Future Computing Platforms"
  Presented at the Carnegie Mellon ECE Department Faculty Retreat, Wheeling, WV, August 2010.
• Onur Mutlu,
  "Multi-core Architectures and Shared Resource Management: Fundamentals and Recent Research"
  Lecture Series at Seoul National University and KAIST (Korea Advanced Institute of Science and Technology), South Korea, July 2010.
• Onur Mutlu,
  "Data Marshaling for Multi-core Architectures"
  Presented at the 37th International Symposium on Computer Architecture (ISCA), Saint-Malo, France, June 2010.
• Onur Mutlu,
  "Designing High-Performance and Fair Shared Multi-core Memory Systems: Two Approaches"
  GSRC (Gigascale Systems Research Center) E-Seminar and Various Other Venues, March-October 2010.
• Onur Mutlu,
  "Rethinking Memory System Design in the Nanoscale Many-Core Era"
  ASPLOS Workshop on Architecting Memory Technologies (WAMT), Pittsburgh, PA March 2010.
• Eiman Ebrahimi,
  "Fairness via Source Throttling: A Configurable and High-Performance Fairness Substrate for Multi-Core Memory Systems"
  Presented at the 15th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Pittsburgh, PA, March 2010.
• Onur Mutlu,
  "Asymmetry Everywhere (with Automatic Resource Management)"
  CRA Workshop on Advancing Computer Architecture Research: Popular Parallel Programming, San Diego, CA, February 2010.
  Position paper
• Yoongu Kim,
  "ATLAS: A Scalable and High-Performance Scheduling Algorithm for Multiple Memory Controllers"
  Presented at the 16th International Symposium on High-Performance Computer Architecture (HPCA), Bangalore, India, January 2010.
• Onur Mutlu,
  "Preventing Memory Performance Attacks in Multi-Core Systems"
  Carnegie Mellon University ECE Department Seminar, Pittsburgh, PA, February 2009.
  Abstract Video
• Onur Mutlu,
  "Parallelism-Aware Batch Scheduling: Enhancing both Performance and Fairness of Shared DRAM Systems"
  Presented at the 35th International Symposium on Computer Architecture (ISCA), Beijing, China, June 2008.
• Onur Mutlu,
  "Stall-Time Fair Memory Access Scheduling for Chip Multiprocessors"
  Presented at the 40th International Symposium on Microarchitecture (MICRO), Chicago, IL, December 2007.
• Onur Mutlu,
  "Memory Performance Attacks: Denial of Memory Service in Multi-Core Systems"
  Presented at the 16th USENIX Security Symposium (USENIX SECURITY), Boston, MA, August 2007.
• Onur Mutlu,
  "Efficient Runahead Execution Processors"
  Ph.D. Defense talk, University of Texas at Austin, April 2006.
• Onur Mutlu,
  "Address-Value Delta (AVD) Prediction"
  Presented at the 38th International Symposium on Microarchitecture (MICRO), Barcelona, Spain, November 2005.
  pdf
• Onur Mutlu,
  "Techniques for Efficient Processing in Runahead Execution Engines"
  Presented at the 32nd International Symposium on Computer Architecture (ISCA), Madison, WI, June 2005.
  pdf
• Onur Mutlu,
  "Wrong Path Events"
  Presented at the 37th International Symposium on Microarchitecture (MICRO), Portland, OR, December 2004.
  pdf
• Onur Mutlu,
  "Cache Filtering Techniques to Reduce the Negative Impact of Useless Speculative Memory References on Processor Performance"
  Presented at the 16th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), Foz Do Iguacu, PR, Brazil, October 2004.
• Onur Mutlu,
  "Runahead Execution: An Alternative to Very Large Instruction Windows for Out-of-order Processors"
  Proceedings of the 9th International Symposium on High-Performance Computer Architecture (HPCA), Anaheim, CA, February 2003.