Exploiting Sub-20 nm CMOS Technology Challenges to Design Affordable SoCs

K. Vaidyanathan, Q. Zhu, L. Liebmann, K. Lai, S. Wu, R. Liu, Y. Liu, A.J. Strojwas, and L. Pileggi, “Exploiting Sub-20 nm CMOS Technology Challenges to Design Affordable SoCs”, Journal of Micro/Nanolithography, J. Micro/Nanolith. MEMS MOEMS, 14(1), 011007, July 2015.

A Wideband RF Receiver with Extended Statistical Element Selection Based Harmonic Rejection Calibration

R. Liu, L. Pileggi and J. A. Weldon, “A Wideband RF Receiver with Extended Statistical Element Selection Based Harmonic Rejection Calibration”, Integration the VLSI Journal, June 2015.

Oscillatory Neural Networks based on TMO Nano-Oscillators and Multi-Level RRAM Cells

T. C. Jackson, A. A. Sharma, J. A. Bain, J. A. Weldon, L. Pileggi, “Oscillatory Neural Networks based on TMO Nano-Oscillators and Multi-Level RRAM Cells”, IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), June 2015.

Device Requirements and Technology-driven Architecture Optimization for Analog Neurocomputing

V. Calayir and L. Pileggi, “Device Requirements and Technology-driven Architecture Optimization for Analog Neurocomputing”, IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), vol. 5, no. 2, pp. 162-173, June 2015.

All-Magnetic MRAM Based on Four Terminal mCell Device

D. M. Bromberg, H. E. Sumbul, J.-G. Zhu, L. Pileggi, “All-Magnetic MRAM Based on Four Terminal mCell Device”, Journal of Applied Physics, May 2015.

A 69.5mW 20GS/s 6b Time-Interleaved ADC with Embedded Time-to-Digital Calibration in 32nm CMOS SOI

V. H-C. Chen and L. Pileggi, “A 69.5mW 20GS/s 6b Time-Interleaved ADC with Embedded Time-to-Digital Calibration in 32nm CMOS SOI”, Special Issue of the IEEE Journal on Solid State Circuits (Invited Paper), vol.49, no.12, pp.2891,2901, Dec. 2014.

Indirect Performance Sensing for On-Chip Self-Healing of Analog and RF Circuits

S. Sun, F. Wang, S. Yaldiz, X. Li, L. Pileggi, A. Natarajan, M. Ferriss, J.-O. Plouchart, B. Sadhu, B. Parker, A. Valdes Garcia, M.A.T. Sanduleanu, J. Tierno, and D. Friedman, “Indirect Performance Sensing for On-Chip Self-Healing of Analog and RF Circuits”, IEEE Transactions on Circuits and Systems, vol.61, no.8, pp.2243,2252, Aug. 2014.

Design Implications of Extremely Restricted Patterning

K. Vaidyanathan, R. Liu, L. Liebmann, K. Lai, A. Strojwas, L. Pileggi, “Design Implications of Extremely Restricted Patterning”, Journal of Micro/Nanolithography, MEMS, and MOEMS, Vol 13 (03), 2014.

A Phase-Change Via-Reconfigurable CMOS LC VCO

C.Y. Wen, G. Slovin, J. Bain, E. Schlesinger, L. Pileggi and J. Paramesh, “A Phase-Change Via-Reconfigurable CMOS LC VCO”, IEEE Transactions on Electron Devices, Vol. 60, No. 12, pp 3979-3988, December 2013.

Spintronic Devices and Circuits for Low-Voltage Logic

D.H. Morris, D.M. Bromberg, J-G. ZHU and L. Pileggi, “Spintronic Devices and Circuits for Low-Voltage Logic”, International Journal of High Speed Electronics and Systems Vol. 21, No. 1 (2012) 1250005.