G. Keskin, J. Proesel and L. Pileggi, “Statistical Modeling and Post Manufacturing Configuration for Scaled Analog CMOS”, Int’l Custom Integrated Circuits Conference, Sept. 2010.
J. Proesel, G. Keskin, J.O. Plouchart and L. Pileggi, “An 8-bit 1.5GS/s Flash ADC Using Post-Manufacturing Statistical Selection”, Int’l Custom Integrated Circuits Conference, Sept. 2010.
A. Bonnoit, S. Herbert and L. Pileggi, “Reducing Variability in Chip-Multiprocessors with Adaptive Body Biasing”, International Symposium on Low Power Electronics and Design, August 2010.
G. Keskin, J. Proesel and L. Pileggi, “Modeling of Statistical Element Selection Based Self-Healing Analog Circuits”, Proceedings of the SRC Techcon Conference, September 2010.
D. Morris, S. Rovner, L. Pileggi, A. Strojwas and K. Vaidyanathan, “Enabling Application-Specific Integrated Circuits on Limited Pattern Constructs”, IEEE Symposium on VLSI (Invited Presentation), June 2010.
L. Liebmann, J. Hibbeler, N. Hieter, L. Pileggi, M. Moe, T. Jhaveri, V. Rovner, “Demonstrating the benefits of template-based design-technology co-optimization”, SPIE Advanced Lithography Conference, February 2010.
T. Jhaveri, A. J. Strojwas, L. Pileggi and V. Rovner, “Economic Assessment of Lithography Strategies for the 22nm Technology Node”, Proceedings of the SPIE/BACUS Symposium on Photomask Technology, September 2009.
J. Proesel, G. Keskin and L. Pileggi, “An 8-bit Flash ADC using Statistical Element Selection”, Proceedings of the SRC Techcon Conference, September 2009.
U. Arslan, J. Wang and L. Pileggi, “An SRAM Design Framework for Deeply-Scaled CMOS”, Proceedings of the SRC Techcon Conference, September 2009.
Tejas Jhaveri, Andrzej Strojwas, Larry Pileggi & Vyacheslav Rovner, “OPC Simplification & Mask Cost Reduction using Regular Design Fabrics”, SPIE Advanced Lithography Conference, February 2009.
Carnegie Mellon University
Hamerschlag Hall, 2113
5000 Forbes Avenue
Pittsburgh, PA 15213-3891 USA
pileggi@andrew.cmu.edu
Phone: 412-268-6774