Process Variation Effects on Input Offset Voltage of CMOS SRAM Sense Amplifiers

G. Keskin, L. Pileggi, X. Li and K. Mai, “Process Variation Effects on Input Offset Voltage of CMOS SRAM Sense Amplifiers”, Proceedings of the SRC Techcon Conference, September 2008.

Defining statistical timing sensitivity for logic circuits with large-scale process and environmental variations

Xin Li, Jiayong Le, Mustafa Celik and Lawrence Pileggi, “Defining statistical timing sensitivity for logic circuits with large-scale process and environmental variations”, IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 27, no. 6, pp. 1041-1054, June 2008.

Thermal Analyses of Confined Cell Design for Phase Change Random Access Memory (PCRAM)

E. Small, S.M. Sadeghipour, L. Pileggi, M. Asheghi, “Thermal Analyses of Confined Cell Design for Phase Change Random Access Memory (PCRAM)”, ITherm, May 2008.

Quadratic Statistical MAX Approximation for Parametric Yield Estimation of Analog/RF Integrated Circuits

Xin Li, Yaping Zhan and Lawrence Pileggi, “Quadratic Statistical MAX Approximation for Parametric Yield Estimation of Analog/RF Integrated Circuits”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 27, no. 5, pp. 831-843, May 2008.

Enabling Technology Scaling with ‘In Production’ Lithography Processes

T. Jhaveri, A.J. Strojwas, L. Pileggi, V. Rovner, “Enabling Technology Scaling with ‘In Production’ Lithography Processes”, SPIE Advanced Lithography Conference, February 2008.

Automated Testability Enhancements for Logic Brick Libraries

J. Brown, B. Taylor, R. D. Blanton, and L. Pileggi, “Automated Testability Enhancements for Logic Brick Libraries”, Proceedings of Design and Test Europe, March 2008.

Digital circuit design challenges and opportunities in the era of nanoscale CMOS

Benton Calhoun, Yu Cao, Xin Li, Ken Mai, Lawrence Pileggi, Rob Rutenbar and Kenneth Shepard, “Digital circuit design challenges and opportunities in the era of nanoscale CMOS”, Proceedings of The IEEE (PTI), vol. 96, no. 2, pp. 343-365, February 2008.

Exact Methods for Physical Design of Regular Logic Bricks

B. Taylor and L. Pileggi, “Exact Methods for Physical Design of Regular Logic Bricks”, Proceedings of the SRC Techcon Conference, October 2007.

Adaptive post-silicon tuning for analog circuits: concept, analysis and optimization

X. Li, B. Taylor, Y-T. Chen and L. Pileggi, “Adaptive post-silicon tuning for analog circuits: concept, analysis and optimization” , Proceedings of the International Conference on Computer-Aided Design, November 2007.

,Regular Layout Performance Dependence on Cell Abutment

K. Yu, S. Wang, A. Gerdemann, C. Weldon, D. Reber, J. Vasek, S. Veeraraghavan, V. Rovner, T. Jhaveri, T. Hersan, L. Pileggi”,Regular Layout Performance Dependence on Cell Abutment”, Joint Conference on Design For Manufacturing, June 2007.