Efficient and Accurate Delay Metrics for RC Interconnect

A. Odabasioglu, M. Celik & L. T. Pileggi, “Efficient and Accurate Delay Metrics for RC Interconnect”, PATMOS: International Workshop on Power and Timing Modeling, Optimization and Simulation, October 1999.

Model Order-Reduction of RC(L) Interconnect including Variational Analysis

Y. Liu, L. Pileggi and A.J. Strojwas, “Model Order-Reduction of RC(L) Interconnect including Variational Analysis”, Proceedings of the Design Automation Conference (Best Paper Award Nomination), June 1999.

IC Analyses Including Extracted Inductance Models

M. Beattie and L. Pileggi, “IC Analyses Including Extracted Inductance Models”, Proceedings of the Design Automation Conference, Invited Paper, June 1999.

Achieving Timing Closure for Giga-Scale IC Designs

L. Pileggi, “Achieving Timing Closure for Giga-Scale IC Designs”, 1999 ACM International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, Invited Paper, March 1999.

S2P: Stable 2-Pole Model for RC Interconnect Delay Analysis

E. Acar, A. Odabasioglu, M. Celik and L. Pileggi, “S2P: Stable 2-Pole Model for RC Interconnect Delay Analysis”, Proceedings of the 9th Great Lakes Symposium on VLSI, March 1999.

Metrics and Bounds for Phase Delay and Signal Attenuation in RCL Clock Trees

M. Celik and L. T. Pileggi, “Metrics and Bounds for Phase Delay and Signal Attenuation in RCL Clock Trees”, IEEE Transactions on Computer-Aided Design, Vol. 18, No. 3, pp. 293-300, March 1999.

Bounds for BEM Capacitance Extraction

M. Beattie and L. T. Pileggi, “Bounds for BEM Capacitance Extraction”, IEEE Transactions on Computer-Aided Design, Vol. 18, No. 3, pp. 311-321, March 1999.

Equipotential Shells for Efficient Partial Inductance Extraction

M. Beattie, L. Alatan and L. Pileggi, “Equipotential Shells for Efficient Partial Inductance Extraction”, Proceedings of the International Electronics Devices Meeting, December 1998.

Determination of Worst-Case Aggressor Alignment for Delay Calculation

P. Gross, R. Arunachalam, K. Rajagopal and L. Pileggi, “Determination of Worst-Case Aggressor Alignment for Delay Calculation”, Proceedings of the International Conference on Computer-Aided Design, November 1998.

h-gamma: An Interconnect Timing Metric Based on the Gamma Distribution Model for the Homogeneous Response

T. Lin, Emrah Acar and L. Pileggi, “h-gamma: An Interconnect Timing Metric Based on the Gamma Distribution Model for the Homogeneous Response”, Proceedings of the International Conference on Computer-Aided Design, November 1998.