L.T. Pillage, X. Huang and R.A. Rohrer, “Asymptotic Waveform Evaluation for Circuits Containing Floating Nodes”, Proceedings IEEE International Symposium on Circuits and Systems, May 1990.
L.T. Pillage, X. Zhang and R.A. Rohrer, “Efficient Final Placement Based on Nets-as- Points”, Proceedings Design Automation Conference, June 1989.
L.T. Pillage, X. Huang and R.A. Rohrer, “AWEsim: Asymptotic Waveform Evaluation for Timing Analysis”, Proceedings Design Automation Conference, June 1989.
L.T. Pillage, C. Wolff and R.A. Rohrer, “Frequency Response Simulation”, Proceedings Custom Integrated Circuits Conference, May 1989.
L.T. Pillage and R.A. Rohrer, “Delay Evaluation with Lumped Linear RLC Interconnect Circuit Models”, Proceedings Decennial Caltech Conference on VLSI, March 1989.
L.T. Pillage and R.A. Rohrer, “A Quadratic Metric for the Initial Placement Problem with a Simple Solution Scheme”, Proceedings Design Automation Conference, June 1988.
L.T. Pillage, X. Huang and R.A. Rohrer, “TALISMAN: A Piecewise Linear Circuit Simulator Based on Tree Link Analysis”, Proceedings IEEE International Conference on Computer-Aided Design, November 1987.
L.T. Pillage, X. Huang and R.A. Rohrer, “Tree Link Partitioning for the Implicit Solution of Circuits”, Proceedings IEEE International Symposium on Circuits and Systems, May 1987.
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