Using Continuization in Reachability Analysis for the Verification of a Phase-Locked Loop

M. Althoff, A. Rajhans, B.H. Krogh, S. Yaldiz, X. Li, L. Pileggi, “Using Continuization in Reachability Analysis for the Verification of a Phase-Locked Loop”, In Proc. Frontiers in Analog Circuit (FAC) Synthesis and Verification, July 2011.

Design Without Rules: A Pattern Construct Methodology

D. Morris, K. Vaidyanathan and L. Pileggi, “Design Without Rules: A Pattern Construct Methodology”, Proceedings of the SRC Techcon Conference, September 2011.

Design of Embedded Memory and Logic Based On Pattern Constructs

D. Morris, K. Vaidyanathan, N. Lafferty, K. Lai, L. Liebmann, L. Pileggi, “Design of Embedded Memory and Logic Based On Pattern Constructs”, IEEE Symposium on VLSI (Invited Presentation), June 2011.

A Non-volatile Look-Up Table Design Using PCM (Phase-Change Memory) Cells

C.-Y. Wen, J. Li, S. Kim, M. Breitwisch, C. Lam, J. Paramesh, L. T. Pileggi, “A Non-volatile Look-Up Table Design Using PCM (Phase-Change Memory) Cells”, IEEE Symposium on VLSI, June 2011.

Virtual Phase Noise Sensor for Self-Healing Voltage Controlled Oscillators

S. Yaldiz, F. Wang, X. Li, L. Pileggi, A.S. Natarajan, M.A. Ferriss, J. Tierno, “Virtual Phase Noise Sensor for Self-Healing Voltage Controlled Oscillators”, GOMACTech-11 Technical Program, March 2011.

Performance and Manufacturability Trade-offs of Pattern Minimization for sub-22nm Technology Nodes

V. Rovner, T. Jhaveri, Daniel Morris, Andrzej J. Strojwas, and Larry Pileggi, “Performance and Manufacturability Trade-offs of Pattern Minimization for sub-22nm Technology Nodes”, SPIE Advanced Lithography Conference, February 2011.

A Phase-change via-Reconfigurable On-Chip Inductor

C.-Y. Wen, E. K. Chua, R. Zhao, T. C. Chong, J. A. Bain, T. E. Schlesinger, L. T. Pileggi, J. Paramesh, “A Phase-change via-Reconfigurable On-Chip Inductor”, International Electron Devices Meeting, December 2010.

Statistical Modeling and Post Manufacturing Configuration for Scaled Analog CMOS

G. Keskin, J. Proesel and L. Pileggi, “Statistical Modeling and Post Manufacturing Configuration for Scaled Analog CMOS”, Int’l Custom Integrated Circuits Conference, Sept. 2010.

An 8-bit 1.5GS/s Flash ADC Using Post-Manufacturing Statistical Selection

J. Proesel, G. Keskin, J.O. Plouchart and L. Pileggi, “An 8-bit 1.5GS/s Flash ADC Using Post-Manufacturing Statistical Selection”, Int’l Custom Integrated Circuits Conference, Sept. 2010.

Reducing Variability in Chip-Multiprocessors with Adaptive Body Biasing

A. Bonnoit, S. Herbert and L. Pileggi, “Reducing Variability in Chip-Multiprocessors with Adaptive Body Biasing”, International Symposium on Low Power Electronics and Design, August 2010.