Metrics for RLC Transmission Line Termination
John Willis, Rohini Gupta and L.T. Pillage, “Metrics for RLC Transmission Line Termination”, IEEE Sponsored Topical Meeting on Electrical Performance of Electronic Packaging, November 1994.
Author Archive for: awp
Entries by awp
The Essence of AWE
L.T. Pillage and R.A. Rohrer, “The Essence of AWE”, Circuits and Devices Magazine, November 1994.
Domain Characterization of Transmission Line Models for Efficient Simulation
R. Gupta, S.Y. Kim and L.T. Pillage, “Domain Characterization of Transmission Line Models for Efficient Simulation”, Proceedings of the International Conference on Computer Design, October 1994.
Time-Domain Macromodels for VLSI Interconnect Analysis
S.Y. Kim, N. Gopal and L.T. Pillage, “Time-Domain Macromodels for VLSI Interconnect Analysis”, IEEE Transactions on Computer-Aided Design, pp. 1257-1270, October 1994.
A Gate Delay Model for High Performance CMOS
F. Dartu, N. Menezes, J. Qian and L.T. Pillage, “A Gate Delay Model for High Performance CMOS”, Proceedings Design Automation Conference, June 1994.
OTTER: Optimal Termination of Transmission Lines Excluding Radiation
R. Gupta and L.T. Pillage, “OTTER: Optimal Termination of Transmission Lines Excluding Radiation”, Proceedings Design Automation Conference, June 1994.
On the Stability of Moment- Matching Approximations in Asymptotic Waveform Evaluation
D.F. Anastaskis, N. Gopal, S.Y. Kim and L.T. Pillage, “On the Stability of Moment- Matching Approximations in Asymptotic Waveform Evaluation”, IEEE Transactions on Computer-Aided Design, pp. 729-736, June 1994.
RICE: Rapid Interconnect Circuit Evaluation Using Asymptotic Waveform Evaluation
C. Ratzlaff and L.T. Pillage, “RICE: Rapid Interconnect Circuit Evaluation Using Asymptotic Waveform Evaluation”, IEEE Transactions on Computer-Aided Design, pp. 763-776, June 1994.
Moment-Matching Approximations for Linear(ized) Circuit Analysis, Semiconductors in IMA Volumes in Mathematics and it’s Applications
N. Gopal, A. Balivada and L.T. Pillage, “Moment-Matching Approximations for Linear(ized) Circuit Analysis, Semiconductors in IMA Volumes in Mathematics and it’s Applications”, F. Odeh, J. Cole, W. M. Coughran, Jr., P. Lloyd, and J. White, editors, Springer-Verlag, pp. 115-130, May 1994.
Predicting Circuit Performance Using Circuit-Level Statistical Timing Analysis
R.B. Brashear, N. Menezes, C. Oh, L.T. Pillage and M.R. Mercer, “Predicting Circuit Performance Using Circuit-Level Statistical Timing Analysis”, Proceedings of the European Design Automation Conference, February 1994.
