Parameterized Macromodeling for Analog System-Level Design Exploration
J. Wang, X. Li and L. Pileggi, “Parameterized Macromodeling for Analog System-Level Design Exploration”, Proceedings of ACM/IEEE Design Automation Conference, June 2007.
Author Archive for: awp
Entries by awp
,Regular Layout Performance Dependence on Cell Abutment
K. Yu, S. Wang, A. Gerdemann, C. Weldon, D. Reber, J. Vasek, S. Veeraraghavan, V. Rovner, T. Jhaveri, T. Hersan, L. Pileggi”,Regular Layout Performance Dependence on Cell Abutment”, Joint Conference on Design For Manufacturing, June 2007.
Robust analog/RF circuit design with projection-based performance modeling
Xin Li, Padmini Gopalakrishnan, Yang Xu and Lawrence Pilegg, “Robust analog/RF circuit design with projection-based performance modeling”, IEEE Trans. on Computer-Aided Design of Integrated Circuits (TCAD), January 2007.
Asymptotic probability extraction for non-Normal performance distributions
Xin Li, Jiayong Le, Padmini Gopalakrishnan and Lawrence Pileggi, “Asymptotic probability extraction for non-Normal performance distributions”, IEEE Trans. on Computer-Aided Design of Integrated Circuits (TCAD), January 2007.
Maximization of Layout Printability/Manufacturability by Extreme Layout Regularity
Tejas Jhaveri, Vyacheslav Rovner, Larry Pileggi, Andrzej J. Strojwas, et al., “Maximization of Layout Printability/Manufacturability by Extreme Layout Regularity”, Journal of Micro/Nanolithography, MEMS, and MOEMS, Vol 6 (03), January 2007.
Statistical Performance Modeling and Optimization
Xin Li, Jiayong Le, Lawrence Pileggi, “Statistical Performance Modeling and Optimization”, Foundations and Trends in Electronic Design Automation: Vol. 1: No 4, pp 331-480, January 2007.
Design Methodology of Regular Logic Bricks for Robust Integrated Circuits
K.Y. Tong, V. Rovner, L. Pileggi and V. Kheterpal, “Design Methodology of Regular Logic Bricks for Robust Integrated Circuits”, Int’l Conference on Computer Design, October 2006.
Active On-Die Suppression of Power Supply Noise
G. Keskin, X. Li and L. Pileggi, “Active On-Die Suppression of Power Supply Noise”, Int’l Custom Integrated Circuits Conference, Sept. 2006.
Efficient Full-Chip Thermal Modeling and Analysis
P. Li, L. Pileggi, M. Ashegi, R. Chandra, “Efficient Full-Chip Thermal Modeling and Analysis”, IEEE Transactions on CAD, Vol. 25, Issue 9, pp. 1763 – 1776, Sept. 2006.
Projection-Based Statistical Analysis of Full-Chip Leakage Power with Non-Log-Normal Distributions
X. Li, J. Le and L. Pileggi, “Projection-Based Statistical Analysis of Full-Chip Leakage Power with Non-Log-Normal Distributions”, Design Automation Conference, June 2006.
