18-447 Course Schedule, Spring 2010

Reading assignments are to be completed BEFORE coming to class. (P&H=The Hardware/Software Interface, Fourth Edition by Patterson and Hennessy, Morgan Kaufmann/Elsvier.) You may also find it helpful to preview lecture notes from Spring 2009 before class. There will be additional assigned readings from research papers.

  • Part 1: L1~L12 Microrocessors
  • Part 2: L13~L20 Memory and I/O
  • Part 3: L21~L27 Multiprocessors

Lecturer JH = James C. Hoe; JM= José Martínez.

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Week Date L# Topic Lecturer Readings Weekly Lab HW
1 1/11 L1 Introduction JH P&H Ch1 No lab meeting. Work on Lab 0a
1/13 L2 ISA Design JH P&H Ch2 (Optional P&H Appendix E.)
2 1/18 No classes (Martin Luther King, Jr. Day) Lab 0: warm-up HW1 out
1/20 L3 MIPS ISA JH P&H Ch2
3 1/25 L4 Single-Cycle Implementation JH P&H 4.1~4.4 Lab 1: single-cycle
1/27 L5 Performance and Cost JH P&H Ch1.5 and 1.7
4 2/1 L6 Multi-Cycle Implementations JM P&H Appendix D Lab 1 due
2/3 L7 Pipelining: Basics JM P&H Ch4.5~4.6 HW1 due, HW2 out
5 2/8 L8 Snow Day Cancellation. Lab 2: pipelining
2/10 L9 Snow Day Cancellation.
6 2/15 L10 Pipelining: Data Hazard and Resolution JM P&H Ch 4.7
2/17 L11 Pipelining: Control Hazard and Resolution JM P&H Ch 4.8 HW2 due
7 2/22 Midterm 1 in Class (coverage through 2/17) Lab 2 due (extended)
2/24 L12 Pipelining: Branch Prediction JH P&H Ch 4.8
8 3/1 L13 Pipelining: Exceptions JH P&H Ch 4.9 Lab 3: control flow
3/3 L14 Caches JH P&H Ch5.1~5.3
3/8 No classes (Spring Break)
3/10 No classes (Spring Break)
9 3/15 L15 More caches JM P&H Ch5.2~5.3 Lab 3 due HW3 out
3/17 L16 VM: protection and paging JM P&H Ch5.4~5.6
10 3/22 L17 VM: page tables and TLB (see L16) JM Rest of P&H Ch5 Lab 4: caches
3/24 L18 VM: modern systems (see L16) JM assigned paper
11 3/29 L19 Busses JH P&H Ch6 No lab meeting HW3 due
3/31 Midterm 2 in class
12 4/5 L20 I/O JH P&H Ch6 Lab 4 due
4/7 L21 ILP to Multicores JH P&H Ch7
13 4/12 L22 Parallel Programming Primer JH TBD Lab 5a: parallel
4/14 L23 Parallel Computer Architecture. Supplemental Slides: Amdahl's Law in the Multicore Era, Hill&Marty JH TBD HW4 out
4/15-17 Spring Carnival
14 4/19 L24 Cache Coherence JM N/A Lab 5a due
4/21 L25 Synchronization JM N/A
15 4/26 L26 Distributed Shared Memory JM N/A Lab 5b due
4/28 L27 Multiprocessor OS Issues JM N/A HW4 due
5/6 Final Exam, 5:30 to 8:30pm