Stack Computers & Forth

This page is no longer maintained.

My Pages:

• Stack Computers -- Complete Book Now On-Line
  (The definitive book on dual-stack computer architecture)

• An Architecture for Combinator Graph Reduction
  (TIGRE: Inspired by Forth & stack architectures)

• A Brief Introduction to Forth
  (From the History of Programming Languages Conference)
• A Preliminary Exploration of Optimized Stack Code Generation
  (Just because you're using a stack-based execution engine doesn't mean your compiler must be inefficient)
• Why Stack Computers?
  (a usenet posting)
• Performance of the Harris RTX 2000 stack architecture versus the Sun 4 Sparc and the Sun 3 M68020 architectures, June 1992.
• Real-Time Performance of the Harris RTX 2000 Stack Architecture versus the Sun 4 SPARC and the Sun 3 M68020 Architectures with a Proposed Real-Time Performance Benchmark, May 1992.
• Some Ideas for Stack Computer Design, June 1991 (includes ideas on pipeled execution).
• Testing Toolkit, September 1990.
• TIGRE: Combinator Graph Reduction on the RTX 2000, June 1990.
• Architectural Opportunities for Future Stack Engines, June 1990.
• Adding a Third Stack to a Forth Engine, June 1990.
• Design Constraints on Embedded Real Time Control Systems, May 1990.
• Modern Stack Computer Architecture, May 1990.
• Design Tradeoffs in Stack Computers, March 1990.
• Testing Toolkit, Forth Dimensions XII(3), 1990.
• RTX 4000, June 1989.
• 32 Bit RTX Chip Prototype, June 1988.
• Fractal Landscapes, Forth Dimensions IX(1), 1988.
• Bresenham Line-Drawing Algorithm, Forth Dimensions VIII(6), 1987.
• Writable Instruction Set Stack Oriented Computers: The WISC Concept, June 1987.
• The WISC Concept, BYTE, April 1987.
• MVP Microcoded CPU/16: History," June 1986.
• MVP Microcoded CPU/16: Architecture," June 1986.
• Redefining Words, November 1985.
• Where to buy a stack computer and on-line supplement to Stack Computers book.

Historical Preservation:

• Novix 1985 Electronic Design

• Glen Haydon, All About Forth 3rd Edition, 1990

• The infamous Harris RTX fish hook ad
• RTX 1988 Concept paper
• Harris 1989 RTX Seminar
• Rochester RTX Training Slides
• RTX Backgrounder
• RTX Promotional Material
• RTX Reprint Series (collected articles)
• RTXpress Newsletters
• RTX 2000 Family Programmer Reference Manual (draft mark-up)
• Harris RTX 2000 Data Sheet
• Harris RTX 2001a Data Sheet
• Harris RTX 2010 Data Sheet
• Harris RTX Software UART application note

• WISC CPU/16 -- circuit board version
• WISC CPU/32 -- circuit board version
• WISC CPU/32 -- two-chip integrated circuit version (RTX-32P)
• WISC Collected Papers (1987)

• BINAR 32-bit CPU Technical Reference (a.k.a. RTX-4000 prototype)
• BINAR 32-bit Opcode Reference
• BINAR 32-bit Evaluation Board Reference
• BINAR Forth Reference
• BINAR Floating Point Library Reference

• US Patent #4,980,821 Stack-Memory-Based Writable Instruction Set Computer Having a Single Data Bus (16 bits)
  (The patent on the WISC CPU/16)
• US Patent #5,053,952 Stack-Memory-Based Writable Instruction Set Computer Having a Single Data Bus (32 bits)
  (The patent on the WISC CPU/32, which evolved into the Harris BINAR/RTX 4000 prototype)

Pointers:

• The Evolution of Forth
  (The definitive paper on the history of Forth, brought to you by Forth Inc.)
• Forth - A Language for Interactive Computing
  (The seminal paper on Forth, circa 1970)

• Skip Carter's Forth Archive
• www.jforth.org
• Forth Interest Group
• Forth FAQ (ftp)
• Jeff Fox/Ultra Technology
• Anton Ertl's Forth Research
• FirmWorks -- FCode and the IEEE 1275 standard is a Forth success story

• The patent for the Novix NC4000, the first single-chip Forth engine: US patent #5,319,757, which was a continuation of US patent #5,070,451.
  

News Groups:

• comp.lang.forth

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Philip Koopman: