Finite-Pole Macromodels of Transmission Lines for Circuit Simulation
S.Y. Kim, N. Gopal and L.T. Pillage, “Finite-Pole Macromodels of Transmission Lines for Circuit Simulation”, Proceedings Custom Integrated Circuits Conference, May 1993.
S.Y. Kim, N. Gopal and L.T. Pillage, “Finite-Pole Macromodels of Transmission Lines for Circuit Simulation”, Proceedings Custom Integrated Circuits Conference, May 1993.
R. Brashear, D. Holberg, M.R. Mercer and L.T. Pillage, “ETA: Electrical-Level Timing Analysis”, Proceedings IEEE International Conference on Computer-Aided Design, November 1992.
S.Y. Kim, N. Gopal and L.T. Pillage, “AWE Macromodels for Incorporation in a Circuit Simulator”, Proceedings IEEE International Conference on Computer-Aided Design, November 1992.
M. Becker, D. Beer, M.J. Gonzalez, C.M. Maziar, L.T. Pillage, M.D. Shermis, T.J. Wagner, G.L. Wise, “Introduction to Electrical and Computer Engineering”, Proceedings of the 1992 American Society on Engineering Education Annual Conference, November 1992
D. F. Anastasakis, N. Gopal, S.Y. Kim and L.T. Pillage, “On the Stability of Moment Matching Approximations in Asymptotic Waveform Evaluation”, Proceedings Design Automation Conference, June 1992.
C. Ratzlaff, S. Pullela and L.T. Pillage, “Effects of RC-Interconnect in a Hierarchical Timing Analyzer”, Proceedings Custom Integrated Circuits Conference, May 1992.
N. Gopal, E. Tuncer, D. Neikirk and L.T. Pillage, “Non-Uniform Models for Transmission Line Analysis”, IEEE Sponsored Topical Meeting on Electrical Performance of Electronic Packaging, April, 1992.
N. Gopal, D. Neikirk and L.T. Pillage, “Evaluating RC Interconnect Using Moment Methods” Proceedings IEEE International Conference on Computer-Aided Design, November 1991.
N. Gopal, C. Ratzlaff, L.T. Pillage, “Constrained Approximation of Dominant Time Constants in RC Circuit Delay Models”, Proceedings of the International Mathematics and Computation Symposium, (Invited Paper), July 1991.
C. Ratzlaff, N. Gopal, L.T. Pillage, “RICE: Rapid Interconnect Circuit Evaluator”, Proceedings Design Automation Conference, (Best Paper Award Nomination), June 1991.
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