18-643 Reconfigurable Logic: Technology, Architecture and Applications

Announcements

  • No recitation first two weeks of school
  • Recitation attendance optional. Recitation provides supplemental help on labs and projects.
  • Students on waitlist should email the instructor. (This is important as Lab 0 starts on day 1 and is due on 9/13 noon. Due to Covid, we have to observe headcount max in the classroom. Waitlisted students cannot be present unless there is enough seats. I will record and post lectures for the first 2 weeks for waitlisted students until attendance is finalized.)

Course Description

Three decades since their original inception as a lower-cost compromise to ASICs, modern Field Programmable Gate Arrays (FPGAs) are versatile and powerful systems-on-a-chip for many applications that need both hardware level efficiency and the flexibility of reprogrammability. More recently, FPGAs have also emerged as a formidable computing substrate with applications ranging from data centers to mobile devices. This course offers a comprehensive coverage of modern FPGAs in terms of technology, architecture and applications. The coverage will also extend into on-going research investigations of future directions. Students will take part in a substantial design project applying the latest FPGA platforms to compute acceleration. Register-Transfer Level (RTL) hardware design experience is required.

Prerequisites: 18-341 or 18-447

Staff

Meetings

  • Lectures: Monday and Wednesday, 1:25pm to 3:15pm, WEH 5421
  • Recitations: Wednesday, 4:40pm to 6:00pm, WEH 5403

Textbooks

  • None required. Please see Canvas for supplemental reference materials.