On-Chip Inductance Models:3D or not 3D?

T. Lin, M. Beattie and L. Pileggi, “On-Chip Inductance Models:3D or not 3D?”, Design and Test in Europe Conference (DATE), March 2002.

A Linear-Centric Simulation Framework for Parametric Fluctuations

E. Acar, L. Pileggi and S. Nassif, “A Linear-Centric Simulation Framework for Parametric Fluctuations”, Design and Test in Europe Conference (DATE), March 2002.

Window-Based Susceptance Models for Large-Scale RLC Circuit Analyses

H. Zhang, B. Krauter, M. Beattie and L. Pileggi, “Window-Based Susceptance Models for Large-Scale RLC Circuit Analyses”, Design and Test in Europe Conference (DATE), March 2002.

Time-Domain Simulation of Variational Interconnect Models

E. Acar, S. Nassif and L. Pileggi, “Time-Domain Simulation of Variational Interconnect Models”, Int’l Symposium on Quality in Electronic Design, March 2002.

Overcoming Wireload Model Uncertainty for Physical Design

P. Gopalakrishnan, A. Odabasioglu, L. T. Pileggi, and S. Raje, “Overcoming Wireload Model Uncertainty for Physical Design”, IEEE Transactions on Computer-Aided Design, Vol. 21, No. 1, January 2002.

Min/Max On-Chip Inductance Models and Delay Metrics

Y-C. Lu, M. Celik, T. Young, and L. Pileggi, “Min/Max On-Chip Inductance Models and Delay Metrics”, Design Automation Conference (DAC) 2001, Las Vegas, June 2001.

False coupling interactions in static timing analysis

R. Arunachalam, R. D. Blanton and L. Pileggi, “False coupling interactions in static timing analysis”, Design Automation Conference (DAC) 2001, Las Vegas, June 2001.

Inductance 101 (Embedded Tutorial)

M. Beattie, L. Pileggi, “Inductance 101 (Embedded Tutorial)”, Design Automation Conference (DAC) 2001, Las Vegas, June 2001.

Modeling Magnetic Coupling for Gigascale Interconnect

M. Beattie, L. Pileggi, “Modeling Magnetic Coupling for Gigascale Interconnect”, Design Automation Conference (DAC) 2001, Las Vegas, June 2001.

Overcoming Wireload Model Uncertainty During Physical Design

P. Gopalakrishnan, A. Odabasioglu, L. Pileggi and S. Raje, “Overcoming Wireload Model Uncertainty During Physical Design”, Int’l Symposium on Physical Design (ISPD), April 2001.