H. Zheng and L. Pileggi, “Robust and Passive Model OrderReduction for Circuits Containing Susceptance Elements”, Proceedings of the International Conference on Computer-Aided Design, November 2002.
T. Lin and L. Pileggi, “Throughput Driven IC Communication Synthesis”, Proceedings of the International Conference on Computer-Aided Design, November 2002.
A. Koorapaty and L. Pileggi, Modular, “Fabric-specific Synthesis for Programmable Architectures”, International Conference on Field Programmable Logic and Applications, September 2002, France.
T. Lin, M. Beattie and L. Pileggi, “On the Efficacy of Simplified 2D On-Chip Inductance Models”, ACM/IEEE Design Automation Conference, June 2002.
H. Zheng and L. Pileggi, “Modeling and Analysis of Regular Symmetrically Structured Power/Ground Distribution Networks”, ACM/IEEE Design Automation Conference, June 2002.
R. Arunachalam, R. D. Blanton, L. T. Pileggi, “Accurate Coupling-centric Timing Analysis Incorporating Temporal and Functional Isolation”, VLSI Design (Special Issue on TimingAnalysis and Optimization for DSM ICs), Vol.15, pp. 605-618, May 2002.
E. Acar, F. Dartu and L. T. Pileggi, “TETA: Transistor level Waveform Evaluation for Timing Analysis”, IEEE Transactions on Computer-Aided Design, Vol. 21, No. 5, May 2002.
D. Pandini, L. Pileggi and A. Strojwas, “Understanding and Addressing the Impact of Wiring Congestion During Technology Mapping”, Int’l Symposium on Physical Design (ISPD), April 2002.
P. Li and L. Pileggi, “A Linear-Centric Modeling Approach to Harmonic Balance Analysis”, Design and Test in Europe Conference (DATE), March 2002.
T. Lin, M. Beattie and L. Pileggi, “On-Chip Inductance Models:3D or not 3D?”, Design and Test in Europe Conference (DATE), March 2002.
Carnegie Mellon University
Hamerschlag Hall, 2113
5000 Forbes Avenue
Pittsburgh, PA 15213-3891 USA
pileggi@andrew.cmu.edu
Phone: 412-268-6774