Y. Zhan, X. Li, A. Strojwas, and L. Pileggi, “Correlation-Aware Statistical Timing Analysis with Non-Gaussian Delay Distributions”, Design Automation Conference, June 2005.
V. Kheterpal, T. Hersan, V. Rovner, D. Motiani, Y. Takagawa, L. Pileggi and A. Strojwas, “Design Methodology for IC Manufacturability Based on Regular Logic-Bricks”, Design Automation Conference, June 2005.
Y. Xu and L. Pileggi, “Metal-mask Configurable RF Integrated Circuits”, GOMACTech-05 Technical Program, April 2005.
X. Li, K.Y. Tong, Y. Xu and L. Pileggi, “Robust Optimization for Radiation Hardened Analog/RF Circuits”, GOMACTech-05 Technical Program, April 2005.
P. Li and L. Pileggi, “Modeling Interconnect Variability Using Efficient Parametric Model Order Reduction”, Design and Test in Europe Conference (DATE), February 2005.
S. Biswas, P. Li, S. Blanton and L. Pileggi, “Specification Test Compaction for Analog Circuits and MEMS”, Design and Test in Europe Conference (DATE), February 2005.
P. Li and L. T. Pileggi, “Compact Reduced-Order Modeling of Weakly Nonlinear Analog and RF Circuits”, IEEE Transactions on Computer-Aided Design, Vol. 23, No. 2, pp. 184-203, February 2005.
R. Batra, P. Li, Y-T. Chen and L. Pileggi, “A Methodology for Analog Circuit Macromodeling”, IEEE International Workshop on Behavioral Modeling and Simulation, October 2004.
R. Marculescu, D. Marculescu and L. Pileggi, “Toward an Integrated Design Methodology Fault Tolerant”, Multiple Clock/Voltage Integrated Systems, Proceedings of the International Conference on Computer Design, October 2004.
V. Chandra, H. Schmit and L. Pileggi, “A Power Aware System Level Interconnect Design Methodology for Latency-Insensitive”, Proceedings of the International Conference on Computer-Aided Design, November 2004.
Carnegie Mellon University
Hamerschlag Hall, 2113
5000 Forbes Avenue
Pittsburgh, PA 15213-3891 USA
pileggi@andrew.cmu.edu
Phone: 412-268-6774