A Phase-Change Via-Reconfigurable CMOS LC VCO

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C.Y. Wen, G. Slovin, J. Bain, E. Schlesinger, L. Pileggi and J. Paramesh, “A Phase-Change Via-Reconfigurable CMOS LC VCO”, IEEE Transactions on Electron Devices, Vol. 60, No. 12, pp 3979-3988, December 2013.

Spintronic Devices and Circuits for Low-Voltage Logic

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D.H. Morris, D.M. Bromberg, J-G. ZHU and L. Pileggi, “Spintronic Devices and Circuits for Low-Voltage Logic”, International Journal of High Speed Electronics and Systems Vol. 21, No. 1 (2012) 1250005.

A 3D-Stacked Logic-in-Memory Accelerator for Application-Specific Data Intensive Computing

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Qiuling Zhu, Berkin Akin, H. Ekin Sumbul, James C. Hoe, Larry Pileggi, Franz Franchetti, “A 3D-Stacked Logic-in-Memory Accelerator for Application-Specific Data Intensive Computing”, IEEE International 3D Systems Integration Conference, October 2013.

Indirect Performance Sensing for On-Chip Analog Self-Healing via Bayesian Model Fusion

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S. Sun, F. Wang, S. Yaldiz, X. Li, L. Pileggi, A. Natarajan, M. Ferriss, J. Plouchart, B. Sadhu, B. Parker, A. Valdes-Garcia, M. Sanduleanu, J. Tierno, D. Friedman, “Indirect Performance Sensing for On-Chip Analog Self-Healing via Bayesian Model Fusion”, Int’l Custom Integrated Circuits Conference, September 2013.

A Logic-in-Memory Accelerated 3D-DRAM for Sparse Matrix-Matrix Multiplication

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Qiuling Zhu, Tobias Graf, H. Ekin Sumbul, Larry Pileggi, Franz Franchetti, “A Logic-in-Memory Accelerated 3D-DRAM for Sparse Matrix-Matrix Multiplication”, Seventeenth Annual High Performance Embedded Computing (HPEC) Workshop at MIT Lincoln Laboratory (Best Paper Award), September 2013.

All-Magnetic Analog Associative Memory

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V. Calayir and L. Pileggi, “All-Magnetic Analog Associative Memory”, International NEWCAS Conference, June 2013.

Neurocomputing and Associative Memories Based on Ovenized Aluminum Nitride Resonators

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V. Calayir, T. Jackson, A. Tazzoli, G. Piazza and L. Pileggi, “Neurocomputing and Associative Memories Based on Ovenized Aluminum Nitride Resonators”, International Joint Conference on Neural Networks, August 2013.

Fully-Digital Oscillatory Associative Memories Enabled by Non-volatile Logic

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V. Calayir and L. Pileggi, “Fully-Digital Oscillatory Associative Memories Enabled by Non-volatile Logic”, International Joint Conference on Neural Networks, August 2013.

An 8.5mW 5GS/s 6b Flash ADC with Dynamic Offset Calibration in 32nm CMOS SOI

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V. H.-C. Chen and L. Pileggi, “An 8.5mW 5GS/s 6b Flash ADC with Dynamic Offset Calibration in 32nm CMOS SOI”, in IEEE Symp. VLSI Circuits, June 2013.

A Linearized Low Noise VCO-Based PLL With Automatic Biasing

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B. Sadhu, M.A. Ferriss, A.S. Natarajan, S. Yaldiz, J-O. Plouchart, A.V. Rylyakov, A. Valdes-Garcia, B.D. Parker, A. Babakhani, S. Reynolds, X. Li, L. Pileggi, R. Harjani, J. Tierno and D. Friedman, “A Linearized Low Noise VCO-Based PLL With Automatic Biasing”, IEEE Journal of Solid State Circuits (Invited), Volume 48 , Issue 5, May 2013.