Calculating the Moments in AWE With Linear Complexity
S. Dutta and L.T. Pillage, “Calculating the Moments in AWE With Linear Complexity”, Proceedings of the SRC Techcon Conference, October 1990.
A Path Tracing Algorithm for Asymptotic Waveform Evaluation of RLC Circuit Delay Models
/0 Comments/in Conference, Electronic Design Automation, Publications /by awpL.T. Pillage and S. Dutta, “A Path Tracing Algorithm for Asymptotic Waveform Evaluation of RLC Circuit Delay Models”, 1990 ACM International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, August 1990.
Asymptotic Waveform Evaluation for Circuits Containing Floating Nodes
/0 Comments/in Conference, Electronic Design Automation, Publications /by awpL.T. Pillage, X. Huang and R.A. Rohrer, “Asymptotic Waveform Evaluation for Circuits Containing Floating Nodes”, Proceedings IEEE International Symposium on Circuits and Systems, May 1990.
Asymptotic Waveform Evaluation
/0 Comments/in Electronic Design Automation, Peer Reviewed, Publications /by awpL.T. Pillage and R.A. Rohrer, “Asymptotic Waveform Evaluation”, IEEE Transactions on Computer-Aided Design (1991 IEEE Best Paper Award), pp. 352-366, April 1990.
Efficient Final Placement Based on Nets-as- Points
/0 Comments/in Conference, Electronic Design Automation, Publications /by awpL.T. Pillage, X. Zhang and R.A. Rohrer, “Efficient Final Placement Based on Nets-as- Points”, Proceedings Design Automation Conference, June 1989.
AWEsim: Asymptotic Waveform Evaluation for Timing Analysis
/0 Comments/in Conference, Electronic Design Automation, Publications /by awpL.T. Pillage, X. Huang and R.A. Rohrer, “AWEsim: Asymptotic Waveform Evaluation for Timing Analysis”, Proceedings Design Automation Conference, June 1989.
Frequency Response Simulation
/0 Comments/in Conference, Electronic Design Automation, Publications /by awpL.T. Pillage, C. Wolff and R.A. Rohrer, “Frequency Response Simulation”, Proceedings Custom Integrated Circuits Conference, May 1989.
Delay Evaluation with Lumped Linear RLC Interconnect Circuit Models
/0 Comments/in Conference, Electronic Design Automation, Publications /by awpL.T. Pillage and R.A. Rohrer, “Delay Evaluation with Lumped Linear RLC Interconnect Circuit Models”, Proceedings Decennial Caltech Conference on VLSI, March 1989.
A Quadratic Metric for the Initial Placement Problem with a Simple Solution Scheme
/0 Comments/in Conference, Electronic Design Automation, Publications /by awpL.T. Pillage and R.A. Rohrer, “A Quadratic Metric for the Initial Placement Problem with a Simple Solution Scheme”, Proceedings Design Automation Conference, June 1988.
TALISMAN: A Piecewise Linear Circuit Simulator Based on Tree Link Analysis
/0 Comments/in Conference, Electronic Design Automation, Publications /by awpL.T. Pillage, X. Huang and R.A. Rohrer, “TALISMAN: A Piecewise Linear Circuit Simulator Based on Tree Link Analysis”, Proceedings IEEE International Conference on Computer-Aided Design, November 1987.
Contact
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pileggi@andrew.cmu.edu
Phone: 412-268-6774