Hierarchical Interconnect Circuit Models
M. Beattie, S. Gupta, L. Pileggi, “Hierarchical Interconnect Circuit Models”, Proceedings of the International Conference on Computer-Aided Design, November 2000.
Can We Continue to Predict Timing of ICs Prior to Manufacturing as Technologies Continue to Scale?
/0 Comments/in Conference, Electronic Design Automation, Publications /by awpR. Arunachalam and L.T. Pileggi, “Can We Continue to Predict Timing of ICs Prior to Manufacturing as Technologies Continue to Scale?”, ISD Magazine, September 2000.
RC(L) Interconnect Sizing with Second Order Considerations
/0 Comments/in Conference, Electronic Design Automation, Publications /by awpT. Lin and L. Pileggi, “RC(L) Interconnect Sizing with Second Order Considerations”, Proceedings of the SRC Techcon Conference, September 2000.
TACO: Timing Analysis with Coupling
/0 Comments/in Conference, Electronic Design Automation, Publications /by awpR. Arunachalam, K. Rajagopal and L. Pileggi, “TACO: Timing Analysis with Coupling”, Proceedings of the Design Automation Conference, June 2000.
Impact of interconnect variations on the clock skew of a gigahertz microprocessor
/0 Comments/in Conference, Electronic Design Automation, Publications /by awpY. Liu, S. Nassif, L. Pileggi and A.J. Strojwas, “Impact of interconnect variations on the clock skew of a gigahertz microprocessor”, Proceedings of the Design Automation Conference, June 2000.
Electromagnetic Parasitic Extraction via a Multipole Method with Hierarchical Refinement
/0 Comments/in Conference, Electronic Design Automation, Publications /by awpM. Beattie and L. Pileggi, “Electromagnetic Parasitic Extraction via a Multipole Method with Hierarchical Refinement”, Proceedings of the International Conference on Computer-Aided Design, November 1999.
Practical Considerations for Passive Reduction of RLC Circuits
/0 Comments/in Conference, Electronic Design Automation, Publications /by awpA. Odabasioglu, M. Celik & L. T. Pileggi, “Practical Considerations for Passive Reduction of RLC Circuits”, Proceedings of the International Conference on Computer- Aided Design, November 1999.
Efficient and Accurate Delay Metrics for RC Interconnect
/0 Comments/in Conference, Electronic Design Automation, Publications /by awpA. Odabasioglu, M. Celik & L. T. Pileggi, “Efficient and Accurate Delay Metrics for RC Interconnect”, PATMOS: International Workshop on Power and Timing Modeling, Optimization and Simulation, October 1999.
Model Order-Reduction of RC(L) Interconnect including Variational Analysis
/0 Comments/in Conference, Electronic Design Automation, Publications /by awpY. Liu, L. Pileggi and A.J. Strojwas, “Model Order-Reduction of RC(L) Interconnect including Variational Analysis”, Proceedings of the Design Automation Conference (Best Paper Award Nomination), June 1999.
IC Analyses Including Extracted Inductance Models
/0 Comments/in Conference, Electronic Design Automation, Publications /by awpM. Beattie and L. Pileggi, “IC Analyses Including Extracted Inductance Models”, Proceedings of the Design Automation Conference, Invited Paper, June 1999.
Contact
Carnegie Mellon University
Hamerschlag Hall, 2113
5000 Forbes Avenue
Pittsburgh, PA 15213-3891 USA
pileggi@andrew.cmu.edu
Phone: 412-268-6774