An Architecture Exploration of Via Patterned Gate Arrays
C. Patel, A. Cozzie, H. Schmit and L. Pileggi, “An Architecture Exploration of Via Patterned Gate Arrays”, Internation Symposium on Physical Design, April 2003.
C. Patel, A. Cozzie, H. Schmit and L. Pileggi, “An Architecture Exploration of Via Patterned Gate Arrays”, Internation Symposium on Physical Design, April 2003.
E. Malley, A. Salinas, K. Ismail and L. Pileggi, “Power Comparison of Throughput Optimized IC Busses”, IEEE Symposium on VLSI, February 2003.
A. Koorapaty, V. Chandra, K.Y. Tong, C. Patel, L. Pileggi and H. Schmit, “Heterogeneous Programmable Logic Block Architectures”, Design and Test in Europe Conference (DATE), March 2003.
Y. Xu and L. Pileggi, “Noise Macromodel for Radio Frequency Integrated Circuits”, Design and Test in Europe Conference (DATE), March 2003.
X. Li and L. Pileggi, “A Frequency Separation Macromodel for System-Level Simulation of RF Circuits”, Asia-Pacific Design Automation Conference, February 2003.
P. Li and L. Pileggi, “Nonlinear Distortion Analysis Via Linear-Centric Models”, Asia- Pacific Design Automation Conference, February 2003.
M. Celik, H. Zheng and L. Pileggi, “Efficient Reduction of Susceptance-Based Package Models Using PRIMA”, Proceedings of the Topical Meeting on Electrical Performance of Electronic Packaging, October 2002.
H. Zheng and L. Pileggi, “Robust and Passive Model OrderReduction for Circuits Containing Susceptance Elements”, Proceedings of the International Conference on Computer-Aided Design, November 2002.
T. Lin and L. Pileggi, “Throughput Driven IC Communication Synthesis”, Proceedings of the International Conference on Computer-Aided Design, November 2002.
A. Koorapaty and L. Pileggi, Modular, “Fabric-specific Synthesis for Programmable Architectures”, International Conference on Field Programmable Logic and Applications, September 2002, France.
Carnegie Mellon University
Hamerschlag Hall, 2113
5000 Forbes Avenue
Pittsburgh, PA 15213-3891 USA
pileggi@andrew.cmu.edu
Phone: 412-268-6774