Exploring Logic Block Granularity for Regular Fabrics
A. Koorapaty, V. Kheterapal, M. Fu, P. Gopalakrishnan and L. Pileggi, “Exploring Logic Block Granularity for Regular Fabrics”, Design and Test in Europe Conference (DATE), February 2004.
An Interconnect Channel Design Methodology for High Performance Integrated Circuits
/0 Comments/in Conference, Electronic Design Automation, Publications /by awpV. Chandra, A. Xu, H. Schmit and L. Pileggi, “An Interconnect Channel Design Methodology for High Performance Integrated Circuits”, Design and Test in Europe Conference (DATE), February 2004.
Modeling Nonlinear Communication ICs Using a Multivariate Formulation
/0 Comments/in Conference, Electronic Design Automation, Publications /by awpP. Li and L. Pileggi, “Modeling Nonlinear Communication ICs Using a Multivariate Formulation”, IEEE International Workshop on Behavioral Modeling and Simulation, October 2003.
A Hybrid Approach to Nonlinear Macromodel Generation for Time-Varying Analog Circuits
/0 Comments/in Conference, Electronic Design Automation, Publications /by awpP. Li, X. Li, Y. Xu and L. Pileggi, “A Hybrid Approach to Nonlinear Macromodel Generation for Time-Varying Analog Circuits”, Proceedings of the International Conference on Computer-Aided Design, November 2003.
Circuit Simulation of Nanotechnology Devices with Non-monotonic I-V Characteristics
/0 Comments/in Conference, Electronic Design Automation, Publications /by awpJ. Le, A. Devgan and L. Pileggi, “Circuit Simulation of Nanotechnology Devices with Non-monotonic I-V Characteristics”, Proceedings of the International Conference on Computer-Aided Design, November 2003.
On-Package Decoupling Optimization with Package Macromodels
/0 Comments/in Conference, Integrated Circuits, Publications /by awpH. Zheng, B. Krauter, L. Pileggi, “On-Package Decoupling Optimization with Package Macromodels”, Int’l Custom Integrated Circuits Conference, Sept. 2003.
Regular Logic Fabrics for a Via Patterned Gate Array (VPGA)
/0 Comments/in Conference, Integrated Circuits, Publications /by awpK.Y. Tong, V. Kheterapal, S. Rovner, H. Schmit, L. Pileggi, R. Puri, “Regular Logic Fabrics for a Via Patterned Gate Array (VPGA)”, Int’l Custom Integrated Circuits Conference, Sept. 2003.
Heterogeneous Logic Block Architectures for Via-Patterned Programmable Fabrics
/0 Comments/in Conference, Integrated Circuits, Publications /by awpA. Koorapaty, L. Pileggi, H. Schmit, “Heterogeneous Logic Block Architectures for Via-Patterned Programmable Fabrics”, International Conference on Field Programmable Logic and Applications, September 2003.
Hierarchical Modeling of Electrostatic and Magnetostatic Coupling
/0 Comments/in Conference, Electronic Design Automation, Publications /by awpS. Gupta and L. Pileggi, “Hierarchical Modeling of Electrostatic and Magnetostatic Coupling”, Proceedings of the SRC Techcon Conference, August 2003.
Simulation Approach for Inductance Effects of VLSI Interconnects
/0 Comments/in Conference, Electronic Design Automation, Publications /by awpX. Qi, G. Leonhardt, D. Flees, X-D, Yang, S. Kim, S. Mueller, H. Mau and L. Pileggi, “Simulation Approach for Inductance Effects of VLSI Interconnects”, In Proc. of the Great Lakes Symposium on VLSI, May 2003.
Contact
Carnegie Mellon University
Hamerschlag Hall, 2113
5000 Forbes Avenue
Pittsburgh, PA 15213-3891 USA
pileggi@andrew.cmu.edu
Phone: 412-268-6774