X. Li, B. Taylor, Y-T. Chen and L. Pileggi, “Adaptive post-silicon tuning for analog circuits: concept, analysis and optimization” , Proceedings of the International Conference on Computer-Aided Design, November 2007.
K. Yu, S. Wang, A. Gerdemann, C. Weldon, D. Reber, J. Vasek, S. Veeraraghavan, V. Rovner, T. Jhaveri, T. Hersan, L. Pileggi”,Regular Layout Performance Dependence on Cell Abutment”, Joint Conference on Design For Manufacturing, June 2007.
J. Wang, X. Li and L. Pileggi, “Parameterized Macromodeling for Analog System-Level Design Exploration”, Proceedings of ACM/IEEE Design Automation Conference, June 2007.
B.Taylor and L. Pileggi, “Exact Combinatorial Optimization Methods for Physical Design of Regular Logic Bricks”, Proceedings of ACM/IEEE Design Automation Conference, June 2007.
X. Li and L. Pileggi, “Efficient Parametric Yield Extraction for Multiple Correlated Non-Normal Performance Distributions of Analog/RF Circuits”, Proceedings of ACM/IEEE Design Automation Conference, June 2007.
K.Y. Tong, V. Rovner, L. Pileggi and V. Kheterpal, “Design Methodology of Regular Logic Bricks for Robust Integrated Circuits”, Int’l Conference on Computer Design, October 2006.
G. Keskin, X. Li and L. Pileggi, “Active On-Die Suppression of Power Supply Noise”, Int’l Custom Integrated Circuits Conference, Sept. 2006.
P. Gopalakrishnan, X. Li and L. Pileggi, “A Metric-Embedding Inspired Approach to Timing-driven FPGA Placement”, Design Automation Conference, June 2006.
X. Li, J. Le and L. Pileggi, “Projection-Based Statistical Analysis of Full-Chip Leakage Power with Non-Log-Normal Distributions”, Design Automation Conference, June 2006.
T. Jhaveri, L. Pileggi, V. Rovner, A.J. Strojwas, “Maximization of layout printability/manufacturability by extreme layout regularity”, SPIE 31st International Symposium on Microlithography Symposium (invited presentation), February 2006.
Carnegie Mellon University
Hamerschlag Hall, 2113
5000 Forbes Avenue
Pittsburgh, PA 15213-3891 USA
pileggi@andrew.cmu.edu
Phone: 412-268-6774