Modeling of Statistical Element Selection Based Self-Healing Analog Circuits

G. Keskin, J. Proesel and L. Pileggi, “Modeling of Statistical Element Selection Based Self-Healing Analog Circuits”, Proceedings of the SRC Techcon Conference, September 2010.

 

Enabling Application-Specific Integrated Circuits on Limited Pattern Constructs

D. Morris, S. Rovner, L. Pileggi, A. Strojwas and K. Vaidyanathan, “Enabling Application-Specific Integrated Circuits on Limited Pattern Constructs”, IEEE Symposium on VLSI (Invited Presentation), June 2010.

Demonstrating the benefits of template-based design-technology co-optimization

L. Liebmann, J. Hibbeler, N. Hieter, L. Pileggi, M. Moe, T. Jhaveri, V. Rovner, “Demonstrating the benefits of template-based design-technology co-optimization”, SPIE Advanced Lithography Conference, February 2010.

Application of the Cost-Per-Good-Die Metric for Process-Design Co-optimization

T. Jhaveri, U. Urslan, V. Rovner, L. Pileggi & A. J. Strojwas, “Application of the Cost-Per-Good-Die Metric for Process-Design Co-optimization”, SPIE Advanced Lithography Conference, Selected for Keynote Presentation, February 2010.

Integrating Dynamic Voltage/Frequency Scaling and Adaptive Body Biasing using Test-time Voltage Selection

A. Bonnoit, S. Herbert, L. Pileggi and D. Marculescu, “Integrating Dynamic Voltage/Frequency Scaling and Adaptive Body Biasing using Test-time Voltage Selection”, International Symposium on Low Power Electronics and Design, August 2009.

An 8-bit Flash ADC using Statistical Element Selection

J. Proesel, G. Keskin and L. Pileggi, “An 8-bit Flash ADC using Statistical Element Selection”, Proceedings of the SRC Techcon Conference, September 2009.

An SRAM Design Framework for Deeply-Scaled CMOS

U. Arslan, J. Wang and L. Pileggi, “An SRAM Design Framework for Deeply-Scaled CMOS”, Proceedings of the SRC Techcon Conference, September 2009.

Fixed Depth Reasoning in Satisfiability and its Applications to Combinatorial Optimization

B. Taylor, D. Morris and L. Pileggi, “Fixed Depth Reasoning in Satisfiability and its Applications to Combinatorial Optimization”, Proceedings of the SRC Techcon Conference, September 2009.

Economic Assessment of Lithography Strategies for the 22nm Technology Node

T. Jhaveri, A. J. Strojwas, L. Pileggi and V. Rovner, “Economic Assessment of Lithography Strategies for the 22nm Technology Node”, Proceedings of the SPIE/BACUS Symposium on Photomask Technology, September 2009.

Creating an Affordable 22nm Node using Design-Lithography Co-Optimization

A. J. Strojwas, T. Jhaveri, V. Rovner and L. Pileggi, “Creating an Affordable 22nm Node using Design-Lithography Co-Optimization”, Proceedings of ACM/IEEE Design Automation Conference, June 2009.