On-Chip Induction Modeling: Basics and Advanced Methods
M. Beattie and L.T. Pileggi, “On-Chip Induction Modeling: Basics and Advanced Methods”, Special Issue of IEEE Transactions on VLSI Systems, vol. 10, No. 6, pp. 712-729, December 2002.
Author Archive for: awp
Entries by awp
Efficient Reduction of Susceptance-Based Package Models Using PRIMA
M. Celik, H. Zheng and L. Pileggi, “Efficient Reduction of Susceptance-Based Package Models Using PRIMA”, Proceedings of the Topical Meeting on Electrical Performance of Electronic Packaging, October 2002.
Throughput Driven IC Communication Synthesis
T. Lin and L. Pileggi, “Throughput Driven IC Communication Synthesis”, Proceedings of the International Conference on Computer-Aided Design, November 2002.
Robust and Passive Model OrderReduction for Circuits Containing Susceptance Elements
H. Zheng and L. Pileggi, “Robust and Passive Model OrderReduction for Circuits Containing Susceptance Elements”, Proceedings of the International Conference on Computer-Aided Design, November 2002.
Fabric-specific Synthesis for Programmable Architectures
A. Koorapaty and L. Pileggi, Modular, “Fabric-specific Synthesis for Programmable Architectures”, International Conference on Field Programmable Logic and Applications, September 2002, France.
Modeling and Analysis of Regular Symmetrically Structured Power/Ground Distribution Networks
H. Zheng and L. Pileggi, “Modeling and Analysis of Regular Symmetrically Structured Power/Ground Distribution Networks”, ACM/IEEE Design Automation Conference, June 2002.
On the Efficacy of Simplified 2D On-Chip Inductance Models
T. Lin, M. Beattie and L. Pileggi, “On the Efficacy of Simplified 2D On-Chip Inductance Models”, ACM/IEEE Design Automation Conference, June 2002.
TETA: Transistor level Waveform Evaluation for Timing Analysis
E. Acar, F. Dartu and L. T. Pileggi, “TETA: Transistor level Waveform Evaluation for Timing Analysis”, IEEE Transactions on Computer-Aided Design, Vol. 21, No. 5, May 2002.
Accurate Coupling-centric Timing Analysis Incorporating Temporal and Functional Isolation
R. Arunachalam, R. D. Blanton, L. T. Pileggi, “Accurate Coupling-centric Timing Analysis Incorporating Temporal and Functional Isolation”, VLSI Design (Special Issue on TimingAnalysis and Optimization for DSM ICs), Vol.15, pp. 605-618, May 2002.
Understanding and Addressing the Impact of Wiring Congestion During Technology Mapping
D. Pandini, L. Pileggi and A. Strojwas, “Understanding and Addressing the Impact of Wiring Congestion During Technology Mapping”, Int’l Symposium on Physical Design (ISPD), April 2002.
