M. Althoff, A. Rajhans, B. Krogh, S. Yaldiz, X. Li, and L. Pileggi, “Formal Verification of Phase-Locked Loops Using Reachability Analysis and Continuization”, Communications of the ACM (invited paper), 2012.
D. Morris, D. Bromberg, J. Zhu, and L. Pileggi, “mLogic: Ultra-Low Voltage Logic Circuits with Non-Volatile Spintronic Devices”, (Invited Paper) Workshop on Frontier Electronics, December 2011.
J. Zhu, D. Bromberg, D. Morris and L. Pileggi, “Novel STT Device Design To Enable All Metallic Spin Logic Circuits Free of Transistors”, (Invited Presentation) Conference on Magnetism and Magnetic Materials, October 2011.
M. Althoff, A. Rajhans, B. Krogh, S. Yaldiz, X. Li and L. Pileggi, “Formal Verification of Phase-Locked Loops Using Reachability Analysis and Continuization”, Int’l Conference on Computer-Aided Design (Best Paper Award), November 2011.
Qiuling Zhu, Franz Franchetti and Larry Pileggi, “Application-Specific Logic-in-Memory for Polar Format Synthetic Aperture Radar”, Fifteenth Annual High Performance Embedded Computing (HPEC) Workshop at MIT Lincoln Laboratory, September 2011.
S. Yaldiz, V. Calayir, X. Li, L. Pileggi, et al, “Indirect Phase Noise Sensing for Self-Healing Voltage Controlled Oscillators”, Int’l Custom Integrated Circuits Conference, Sept. 2011.
C.-Y. Wen, J. Paramesh, L. T. Pileggi, J. Li, S. Kim, J. Proesel, C. Lam, “Post-Silicon Calibration of Analog CMOS Using Phase-Change Memory Cells”, European Solid-State Device Research Conference (ESSDERC), September 2011.
M. Althoff, A. Rajhans, B.H. Krogh, S. Yaldiz, X. Li, L. Pileggi, “Using Continuization in Reachability Analysis for the Verification of a Phase-Locked Loop”, In Proc. Frontiers in Analog Circuit (FAC) Synthesis and Verification, July 2011.
D. Morris, K. Vaidyanathan and L. Pileggi, “Design Without Rules: A Pattern Construct Methodology”, Proceedings of the SRC Techcon Conference, September 2011.
C.-Y. Wen, J. Li, S. Kim, M. Breitwisch, C. Lam, J. Paramesh, L. T. Pileggi, “A Non-volatile Look-Up Table Design Using PCM (Phase-Change Memory) Cells”, IEEE Symposium on VLSI, June 2011.
