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Table of Contents
Research
James C. Hoe is interested in many aspects of computer architecture and digital hardware design. His current research focuses on computer architecture, reconfigurable computing and high-level hardware design and synthesis. (Google Scholar Profile, select papers and student theses)
Current Projects
Past Projects
- Smart Headlights (2014~2019)
- GraphGen: Graph Computation Accelerator Compiler (2013~2016)
- Pipeline Synthesis from Transaction-based Specifications (2009~2012, a.k.a. T-Piper)
- FPGA Prototyping and Emulation of Computer Systems (2005~2011, a.k.a. ProtoFlex)
- Reliable Processors and Systems (2001~2008, a.k.a. TRUSS)
- SMARTS Simulation Sampling (2002~2006)
- High Performance Cluster Computing (1992~2000, a.k.a., Start-X and Start-Jr)
Downloads and Demos
- Frozen Snapshots (i.e., the student responsible graduated)
- CONNECT Network-on-chip RTL Generator (Michael Papamichael now at MSR)
- CoRAM-classic demo and download (Eric Chung now at MSR)
- GraphGen demo and download (Gabe Weisz now at ISI)
- FFT Hardware IP Generator (Peter Milder now at SUNY Stony Brook)
- T-piper tools, examples and tutorials ( Eriko Nurvitadhi now at Intel Labs)
- ProtoFlex (Eric Chung now at MSR)