Latch-Based Logic Locking

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J. Sweeney, M. Zackriya, S. Pagliarini, and L. Pileggi, “Latch-Based Logic Locking,” Government Microcircuit Applications and Critical Technology Conference (GOMACTech), March 2020.

Chip-to-chip Authentication Method based on SRAM PUF and Public Key Cryptography

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I. Karageorgos, M. Isgenc, S. Pagliarini, and L. Pileggi, Chip-to-chip Authentication Method based on SRAM PUF and Public Key Cryptography, Journal of Hardware and Systems Security, (DOI: 10.1007/s41635-019-00080-y).

Securing Digital Systems via Split-Chip Obfuscation

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J. Sweeney, M. Zackriya, S. Pagliarini and L. Pileggi, Securing Digital Systems via Split-Chip Obfuscation, GOMACTech Technical Program, March 2019.

Efficient and Secure Intellectual Property (IP) Design with Split Fabrication

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K. Vaidyanathan, R. Liu, E. Sumbul, Q. Zhu, F. Franchetti, L. Pileggi, “Efficient and Secure Intellectual Property (IP) Design with Split Fabrication”, Hardware-Oriented Security and Trust, May 2014.

Building Trusted ICs using Split Fabrication

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K. Vaidyanathan, B. P. Das, E. Sumbul, R. Liu, L. Pileggi, “Building Trusted ICs using Split Fabrication”, Hardware-Oriented Security and Trust, May 2014.

Detecting Reliability Attacks during Split Fabrication using Test-only BEOL Stack

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K. Vaidyanathan, B. Prasad Das, L. Pileggi, “Detecting Reliability Attacks during Split Fabrication using Test-only BEOL Stack”, IEEE/ACM Design Automation Conference, June 2014.

Efficient System-Level Performance Modeling and Optimization for Reprogrammable Radio Frequency (RF) Systems

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J. Tao, Y-C. Wang, M. Jun, X. Li, R. Negi, T. Mukherjee and L. Pileggi, “Efficient System-Level Performance Modeling and Optimization for Reprogrammable Radio Frequency (RF) Systems”, Frontiers in Analog CAD Workshop, February 2013.