S. Yaldiz, U. Arslan, X. Li and L. Pileggi, “Efficient Statistical Analysis of Read Timing Failures in SRAM Circuits”, IEEE Int’l Symposium on Quality in Electronic Design, March 2009.
Tejas Jhaveri, Andrzej Strojwas, Larry Pileggi & Vyacheslav Rovner, “OPC Simplification & Mask Cost Reduction using Regular Design Fabrics”, SPIE Advanced Lithography Conference, February 2009.
Lars Liebmann, Larry Pileggi, Jason Hibbeler, Vyacheslav Rovner, Tejas Jhaveri, Greg Northrop, “Simplify to Survive: Prescriptive Layouts Ensure Profitable Scaling to 32nm and Beyond”, SPIE Advanced Lithography Conference, February 2009.
Bin Wan, Jian Wang, Gokce Keskin, and Lawrence T. Pileggi, “Ring Oscillators for Single Process-Parameter Monitoring”, IEEE Workshop on Test Structure Design for Variability Characterization, November 2008.
J. Proesel and L. Pileggi, ‘A 0.6-to-1V Inverter-Based 5-bit Flash ADC in 90nm Digital CMOS’, Int’l Custom Integrated Circuits Conference, Sept. 2008.
U. Arslan, M. McCartney, M. Bhargava, X. Li, K. Mai and L. Pileggi, “Variation-Tolerant SRAM Sense-Amplifier Timing Using Configurable Replica Bitlines”, Int’l Custom Integrated Circuits Conference, Sept. 2008.
L. Pileggi, G. Keskin, X. Li, K. Mai and J. Proesel, “Mismatch Analysis and Statistical Design at 65 nm and Below”, Invited Paper, Int’l Custom Integrated Circuits Conference, Sept. 2008.
U. Arslan, M. McCartney, M. Bhargava, L. Pileggi and K. Mai, “Variation-Tolerant SRAM Sense-Amp Timing using Configurable Replica Bitlines”, Proceedings of the SRC Techcon Conference, September 2008.
J. Proesel and L. Pileggi, “A 0.6-to-1V Inverter-Based 5-bit Flash ADC in 90nm Digital CMOS”, Proceedings of the SRC Techcon Conference, September 2008.
G. Keskin, L. Pileggi, X. Li and K. Mai, “Process Variation Effects on Input Offset Voltage of CMOS SRAM Sense Amplifiers”, Proceedings of the SRC Techcon Conference, September 2008.
