J.-O. Plouchart, M. Ferriss, A. Natarajan, A. Valdes-Garcia, B. Sadhu, A. Rylyakov, B. Parker, M. Beakes, A. Babakani, S. Yaldiz, L. Pileggi, R. Harjani, S. Reynolds, J. A. Tierno, D. Friedman, “A 23.5GHz PLL with an adaptively biased VCO in 32nm SOI-CMOS”, Int’l Custom Integrated Circuits Conference, Sept. 2012.