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+ | ====== Digital Signal Processing Hardware ====== | ||
+ | This research develops a domain-specific hardware synthesis framework for digital signal processing (DSP) computations. | ||
+ | |||
+ | * **Students** | ||
+ | * Berkin Akin ([[http:// | ||
+ | * Robert J. Koutsoyannis (MS' | ||
+ | * [[http:// | ||
+ | * [[http:// | ||
+ | * Guanglin Xu | ||
+ | * **[[http:// | ||
+ | * **[[http:// | ||
+ | * **Efficient Memory Accesses** | ||
+ | * Berkin Akin, Franz Franchetti, James C. Hoe. **HAMLeT Architecture for Parallel Data Reorganization in Memory**. IEEE Micro Near-Data Processing Special Issue, Jan/Feb 2016 ([[http:// | ||
+ | * Qi Guo, Tze Men Low, Nikos Alachiotis, Berkin Akin, Larry Pileggi, James C. Hoe, Franz Franchetti. **Enabling Portable Energy Efficiency with Memory Accelerated Library**. Proc. ACM/IEEE International Symposium on Microarchitecture (MICRO), December 2015. ([[http:// | ||
+ | * Berkin Akin. **A Formal Approach to Memory Access Optimization: | ||
+ | * Berkin Akin, Franz Franchetti, James C. Hoe. **FFTs with Near-Optimal Memory Access Through Block Data Layouts: Algorithm, Architecture and Design Automation**. Journal of Signal Processing Systems, June 2015. ([[http:// | ||
+ | * Berkin Akin, Franz Franchetti, James C. Hoe. **Data reorganization in memory using 3D-stacked DRAM**. Proc. International Symposium on Computer Architecture (ISCA), June 2015. ([[http:// | ||
+ | * Fazle Sadi, Berkin Akin, Doru Popovici, James C. Hoe, Larry Pileggi, and Franz Franchetti. **Algorithm/ | ||
+ | * Berkin Akin, James C. Hoe, and Franz Franchetti. **HAMLeT: Hardware Accelerated Memory Layout Transform within 3D-stacked DRAM**. Proc. High Performance Extreme Computing Conference (HPEC), September 2014. ([[http:// | ||
+ | * Berkin Akin, Franz Franchetti, and James C. Hoe. **Understanding the Design Space of DRAM-Optimized Hardware FFT Accelerators**. Proc. International Conference on Application-specific Systems, Architectures and Processors (ASAP), June 2014. ([[http:// | ||
+ | * Berkin Akin, Franz Franchetti, and James C. Hoe. **FFTs with Near-Optimal Memory Access Through Block Data Layouts**. Proc. International Conference on Acoustics, Speech, and Signal Processing (ICASSP), May 2014. ([[http:// | ||
+ | * Q. Zhu, B. Akin, H.E. Sumbul, F. Sadi, J.C. Hoe, L. Pileggi, F. Franchetti. | ||
+ | * Berkin Akin, Peter A. Milder, Franz Franchetti and James C. Hoe. **Memory Bandwidth Efficient Two-Dimensional Fast Fourier Transform Algorithm and Implementation for Large Problem Sizes.** Proc. International Symposium on Field-Programmable Custom Computing Machines (FCCM), April 2012. ([[http:// | ||
+ | |||
+ | * **Linear Transform Kernels** | ||
+ | * **Computer Generation of Hardware for Digital Signal Processing Transforms**. Peter A. Milder, Franz Franchetti, James C. Hoe, and Markus Püschel. | ||
+ | * **A Mathematical Approach for Compiling and Optimizing Hardware Implementations of DSP Transforms.** Peter A. Milder. PhD Thesis, August 2011 ([[http:// | ||
+ | * **Hardware Implementation of the Discrete Fourier Transform with Non-Power-of-Two Problem Size**. P. Milder, F. Franchetti, J. C. Hoe, and M. Pueschel. International Conference on Acoustics, Speech, and Signal Processing (ICASSP), March 2010. ([[http:// | ||
+ | * **Automatic Generation of Streaming Datapaths for Arbitrary Fixed Permutations**. P. A. Milder, J. C. Hoe and M. Pueschel. | ||
+ | * **Permuting Streaming Data Using RAMs**. M. Pueschel, P. A. Milder and J. C. Hoe. Journal of the ACM (JACM), Volume 56 , Issue 2, April 2009. ([[http:// | ||
+ | * **Formal Datapath Representation and Manipulation for Implementing DSP Transforms**. P. A. Milder, F. Franchetti, J. C. Hoe, M. Pueschel. Design Automation Conference (DAC), June 2008. ([[http:// | ||
+ | * **Time-Multiplexed Multiple Constant Multiplication**. P. Tummeltshammer, | ||
+ | * **Generating FPGA-Accelerated DFT Libraries**. P. D' | ||
+ | * **Spiral: Joint Runtime and Energy Optimization of Linear Transforms**. | ||
+ | * ** Fast and Accurate Resource Estimation of Automatically Generated Custom DFT IP Cores**. | ||
+ | * **Automatic Generation of Customized Discrete Fourier Transform IPs**. G. Nordin, P. Milder, J. C. Hoe, and M. Pueschel. Design Automation Conference (DAC), June 2005. ([[http:// | ||
+ | * **Custom Optimized Multiplierless Implementations of DSP Algorithms**. M. Pueschel, A. Zelinski, and J. C. Hoe. International Conference on Computer Aided Design (ICCAD), November 2004. ([[http:// | ||
+ | * **Multiple Constant Multiplication by Time Multiplexed Mapping of Addition Chains**. P. Tummeltshammer, | ||
+ | * **Automatic Cost Minimization for Multiplierless Implementations of Discrete Signal Transforms**. A. Zelinski, M. Pueschel, S. Misra, and J. C. Hoe. International Conference on Acoustics, Speech, and Signal Processing (ICASSP), May 2004. ([[http:// | ||
+ | * **OFDM** | ||
+ | * **Improving Fixed-Point Accuracy of FFT cores in O-OFDM Systems**. Robert Koutsoyannis, | ||
+ | * **Dependence of Optical OFDM Transceiver ASIC Compexity on FFT Size**. Rachid Bouziane, Peter A. Milder, Robert Koutsoyannis, | ||
+ | * **Design and Simulation of 25 Gb/s Optical OFDM Transceiver ASICs**. Peter A. Milder, Rachid Bouziane, Robert Koutsoyannis, | ||
+ | * **Design Studies for ASIC Implementations of 28 GS/s Optical QPSK- and 16-QAM-OFDM Transceivers**. Rachid Bouziane, Peter A. Milder, Robert Koutsoyannis, | ||
+ | * **Optimizing FFT Precision in Optical OFDM Transceivers**. Rachid Bouziane, Robert Koutsoyannis, | ||
+ | * **Design and Simulation of 25 Gb/s Optical OFDM Transceiver ASICs**. Peter A. Milder, Rachid Bouziane, Robert Koutsoyannis, | ||
+ | * **Real-Time Digital Signal Processing for the Generation of Optical Orthogonal Frequency Division Multiplexed Signals**. Y. Benlachtar, P. M. Watts, R. Bouziane, P. A. Milder, R. J. Koutsoyannis, | ||
+ | * **Design Studies for an ASIC Implementation of an Optical OFDM Transceiver**. R. Bouziane, P. A. Milder, R. J. Koutsoyannis, | ||
+ | * **Real-Time FPGA-Based 21.4GS/s Optical OFDM Transmitter**. Y. Benlachtar, P. M. Watts, R. Bouziane, P. A. Milder, D. Rangaraj, A. Cartolano, R. Koutsoyannis, | ||
+ | * **21.4 GS/s Real-Time DSP-Based Optical OFDM Signal Generation and Transmission Over 1600 km of Uncompensated Fibre**. Y. Benlachtar, P. M. Watts, R. Bouziane, P. Milder, R. Koutsoyannis, | ||
+ | * **Image Processing** | ||
+ | * **Highly Efficient Performance Portable Tracking of Evolving Surfaces**. Wei Yu, Franz Franchetti, and James C. Hoe. Proc. International Parallel and Distributed Processing Symposium (IPDPS), May 2012. ([[http:// | ||
+ | * **Performance Portable Tracking of Evolving Surfaces.** Wei Yu. PhD Thesis, May 2011 ([[http:// | ||
+ | * **High Performance Stereo Vision Designed for Massively Data Parallel Platforms**. W. Yu, T. Chen, F. Franchetti, and J. C. Hoe. IEEE Transactions on Circuits and Systems for Video Technology, Volume 20, Number 11, November 2010. ([[http:// | ||
+ | * **Fast Bilateral Filtering by Adapting Block Size**. W. Yu, F. Franchetti, J. C. Hoe, Y.-J. Chang, T. Chen. Proc. International Conference on Image Processing (ICIP), September 2010. ([[http:// | ||
+ | * **Real Time Stereo Vision Using Exponential Step Cost Aggregation on GPU**. W. Yu, T. Chen, J. C. Hoe. International Conference on Image Processing (ICIP), November 2009. ([[http:// |