18-643 Reconfigurable Logic: Technology, Architecture and Applications

• No recitation first two weeks of school
• Recitation attendance optional. Recitation provides supplemental help on labs and projects.
• students on waitlist should email instructor for access to Canvas (important)
• Fall 2020: Lectures and recitations will be conducted by Zoom. Course contents and operations are largely unchanged from in-person offerings in the past. New for F20, each student will be issued an Ultra96 for use during the term. We will also use Intel PAC cards on DevCloud. Students can work individually or in a group of 2 on labs and project (instead of groups of 2 or 3 normally).

• Fall 2019 Lecture Schedule and Notes
• Preview lecture notes from the last completed semester
• Very short lesson on RTL Verilog
• A Short Intro to ModelSim Verilog Simulator
• Communications
  • visit Canvas for official announcements, handouts, work submissions, etc.
  • use Piazza for lab-related discussions
  • subscribe fpga-list@lists.andrew.cmu.edu to receive FPGA related seminars and job announcements (available to anyone with cmu.edu or pitt.edu address)

Three decades since their original inception as a lower-cost compromise to ASICs, modern Field Programmable Gate Arrays (FPGAs) are versatile and powerful systems-on-a-chip for many applications that need both hardware level efficiency and the flexibility of reprogrammability. More recently, FPGAs have also emerged as a formidable computing substrate with applications ranging from data centers to mobile devices. This course offers a comprehensive coverage of modern FPGAs in terms of technology, architecture and applications. The coverage will also extend into on-going research investigations of future directions. Students will take part in a substantial design project applying the latest FPGA platforms to compute acceleration. Register-Transfer Level (RTL) hardware design experience is required.

Prerequisites: 18-341 or 18-447

• Instructor
  • James C. Hoe (contact)
• Teaching Assistants
  • Joe Sweeney, jsweene1@andrew.cmu.edu
  • Zhipeng Zhao, zzhao1@andrew.cmu.edu
  • See Canvas for contact info and office hours

• Lectures: Tuesday and Thursday, 12:00pm to 1:20pm, DH 1112
• Recitations: Wednesday, 4:30pm-5:20pm, DH 1112

• Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation, 1st Edition, edited by Scott Hauck and André DeHon, Morgan Kaufmann, 2007. (ACM student members can access this on-line edition by logging in.)

• The Zynq Book, by Louise H. Crockett, et al., Strathclyde Academic Media, 2014. (download ebook.)

• Reading assignments will be supplemented by research papers (lots).

• Canvas
• Computer Architecture Lab at Carnegie Mellon (CALCM)
• OpenCores (repository of GPL hardware IPs)
• "FPGAs For Dummies" eBook
• Microzed Chronicles
• Ultra96 resource page
• HDLBits Verilog Practice