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18-643_reconfigurable_logic [2021/08/29 16:46] – [Announcements] edit | 18-643_reconfigurable_logic [2024/01/03 14:39] – [Quick Links] edit | ||
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===== Announcements ===== | ===== Announcements ===== | ||
+ | * [[https:// | ||
+ | * When the course started in 2015, " | ||
+ | * **Recitation attendance is optional.** Recitation provides supplemental help on labs and projects. | ||
* No recitation first two weeks of school | * No recitation first two weeks of school | ||
- | * Recitation attendance optional. Recitation provides supplemental help on labs and projects. | + | * After the semester starts, students |
- | * **Students | + | |
===== Quick Links ===== | ===== Quick Links ===== | ||
- | * [[18-643 Course Schedule, Fall 2021 | Fall 2021 Lecture Schedule and Notes]] | + | * [[18-643 Course Schedule, Fall 2023 | Fall 2023 Lecture Schedule and Notes]] |
- | * Preview lecture notes from [[18-643 Course Schedule, Fall 2020 |the last completed semester]] | + | * Preview lecture notes from [[18-643 Course Schedule, Fall 2023 |the last completed semester]] |
* Communications | * Communications | ||
* visit [[https:// | * visit [[https:// | ||
- | * use [[https:// | + | * use [[https:// |
* subscribe [[http:// | * subscribe [[http:// | ||
+ | * [[https:// | ||
===== Course Description ===== | ===== Course Description ===== | ||
- | Three decades since their original inception as a lower-cost compromise to ASICs, modern Field Programmable Gate Arrays (FPGAs) are versatile and powerful systems-on-a-chip for many applications that need both hardware level efficiency and the flexibility of reprogrammability. More recently, FPGAs have also emerged as a formidable computing substrate with applications ranging from data centers to mobile devices. This course offers a comprehensive coverage of modern FPGAs in terms of technology, architecture and applications. The coverage will also extend into on-going research investigations of future directions. Students will take part in a substantial design project applying the latest FPGA platforms to compute acceleration. Register-Transfer Level (RTL) hardware design experience is required. | + | Three decades since their original inception as a lower-cost compromise to ASICs, modern Field Programmable Gate Arrays (FPGAs) are versatile and powerful systems-on-a-chip for many applications that need both hardware level efficiency and the flexibility of reprogrammability. More recently, FPGAs have also emerged as a formidable computing substrate with applications ranging from data centers to mobile devices. This course offers a comprehensive coverage of modern FPGAs in terms of technology, architecture and applications. The coverage will also extend into on-going research investigations of future directions. Students will take part in a substantial design project applying the latest FPGA platforms to compute acceleration. |
Prerequisites: | Prerequisites: | ||
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* [[:home |James C. Hoe]] ([[: | * [[:home |James C. Hoe]] ([[: | ||
* Teaching Assistants | * Teaching Assistants | ||
- | * Shashank Obla | + | * [[cw4@cmu.edu |Chengyue Wang]] |
+ | * [[jiajunhu@andrew.cmu.edu |Jiajun Hu]] | ||
* [[https:// | * [[https:// | ||
+ | * [[https:// | ||
===== Meetings ===== | ===== Meetings ===== | ||
- | * Lectures: | + | * Lectures: |
- | * Recitations: | + | * Recitations: |