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18-100_course_schedule_spring_2015 [2017/09/29 14:11] – external edit 127.0.0.118-100_course_schedule_spring_2015 [2024/01/03 14:43] (current) edit
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     * 18-100 Introduction to ECE [[http://www.ece.cmu.edu/courses/18100|Course Description]]     * 18-100 Introduction to ECE [[http://www.ece.cmu.edu/courses/18100|Course Description]]
     * [[http://blackboard.andrew.cmu.edu/ |Blackboard Site]]     * [[http://blackboard.andrew.cmu.edu/ |Blackboard Site]]
-    * [[18-100_course_schedule_spring_2013 | Archived Spring 2013 Schedule and Lecture Notes]] 
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 | | 3/19 | L17 | Sampling, analog to digital conversion, quantization, base conversions, binary arithmetic | | | 3/19 | L17 | Sampling, analog to digital conversion, quantization, base conversions, binary arithmetic |
 |10| 3/24 | L18 | Wrap up any remaining signal processing items. Review for Exam 2 | |10| 3/24 | L18 | Wrap up any remaining signal processing items. Review for Exam 2 |
-| | 3/26 | [[https://www.ece.cmu.edu/~jhoe/course/ece100/S15handouts/L19.pdf |L19]] | Introduction to Computer Systems, begin basic assembly language |+| | 3/26 | [[https://users.ece.cmu.edu/~jhoe/course/ece100/S15handouts/L19.pdf |L19]] | Introduction to Computer Systems, begin basic assembly language |
 |11| 3/31 | ^ Exam II | |11| 3/31 | ^ Exam II |
-| | 4/2 | [[https://www.ece.cmu.edu/~jhoe/course/ece100/S15handouts/L20.pdf |L20]] | Basic assembly language (cont.) | +| | 4/2 | [[https://users.ece.cmu.edu/~jhoe/course/ece100/S15handouts/L20.pdf |L20]] | Basic assembly language (cont.) | 
-|12| 4/7 | [[https://www.ece.cmu.edu/~jhoe/course/ece100/S15handouts/L21.pdf |L21]] | Logic gates, Boolean expressions, DeMorgan's theorems, begin combinational logic circuits | +|12| 4/7 | [[https://users.ece.cmu.edu/~jhoe/course/ece100/S15handouts/L21.pdf |L21]] | Logic gates, Boolean expressions, DeMorgan's theorems, begin combinational logic circuits | 
-| | 4/9 | [[https://www.ece.cmu.edu/~jhoe/course/ece100/S15handouts/L22.pdf |L22]] | Combinational logic circuits (cont.), truth tables, digital circuit schematics, two-level circuit representation | +| | 4/9 | [[https://users.ece.cmu.edu/~jhoe/course/ece100/S15handouts/L22.pdf |L22]] | Combinational logic circuits (cont.), truth tables, digital circuit schematics, two-level circuit representation | 
-|13| 4/14 | [[https://www.ece.cmu.edu/~jhoe/course/ece100/S15handouts/L23.pdf |L23]] | Karnaugh maps, adders, multiplexers, de-multiplexers |+|13| 4/14 | [[https://users.ece.cmu.edu/~jhoe/course/ece100/S15handouts/L23.pdf |L23]] | Karnaugh maps, adders, multiplexers, de-multiplexers |
 | | 4/16 | ^ No class, Spring Carnival | | | 4/16 | ^ No class, Spring Carnival |
-|14| 4/21 | [[https://www.ece.cmu.edu/~jhoe/course/ece100/S15handouts/L24.pdf |L24]] | Feedback in logic circuits, SR flip-flops, D flip-flops, master-slave edge-triggered flip-flops, sequential logic, state diagrams, state transition tables, begin finite state machine design | +|14| 4/21 | [[https://users.ece.cmu.edu/~jhoe/course/ece100/S15handouts/L24.pdf |L24]] | Feedback in logic circuits, SR flip-flops, D flip-flops, master-slave edge-triggered flip-flops, sequential logic, state diagrams, state transition tables, begin finite state machine design | 
-| | 4/23| [[https://www.ece.cmu.edu/~jhoe/course/ece100/S15handouts/L25.pdf |L25]] | Continue finite state machine design, design of counters, output mapping, sequential logic circuits with external inputs  |+| | 4/23| [[https://users.ece.cmu.edu/~jhoe/course/ece100/S15handouts/L25.pdf |L25]] | Continue finite state machine design, design of counters, output mapping, sequential logic circuits with external inputs  |
 |15| 4/28 | L26 | Review for Exam III |  |15| 4/28 | L26 | Review for Exam III | 
 | | 4/30 | ^ Exam III | | | 4/30 | ^ Exam III |
 | | 5/8 | ^ Final Exam, 8:30~11:30, GHC 4401| | | 5/8 | ^ Final Exam, 8:30~11:30, GHC 4401|
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