November 5 (Thursday)
8:00AM ~ 8:15AM: Opening Remarks8:15AM ~ 9:00AM: Keynote
Chair: Helmut Graeb, Technische Universitaet Muenchen, Germany
Trends and Challenges of Automotive Electronics
LeRoy Winemberg, Freescale, USA
9:00AM ~ 10:15AM: Session I: Simulation and Validation
Chair: Chris Myers, University of Utah, USA
Does It Take Longer to Injection Lock a High-Q Oscillator?
Tianshi Wang, UC Berkeley, USA
Jaijeet Roychowdhury, UC Berkeley, USA
Analog/Mixed-Signal Measurements using Timed Regular Expressions
Thomas Ferrere, VERIMAG, France
Oded Maler, CNRS-VERIMAG, France
Dejan Nickovic, Austrian Institute of Technology, Austria
Dogan Ulus, VERIMAG, France
Transient-Simulation Guided Graph Sparsification Approach to Scalable Harmonic Balance (HB) Analysis of Post-Layout RF Circuits Leveraging Heterogeneous CPU-GPU Computing Systems
Lengfei Han, Michigan Tech University, USA
Zhuo Feng, Michigan Tech University, USA
10:15AM ~ 10:45AM: Break
10:45AM ~ 12:00PM: Section II: Emerging Circuits
Chair: Sheldon X.-D. Tan, UC Riverside, USA
Automatic Design of Analog/Mixed-Signal Power-Down Circuitry
Michael Zwerger, Technische Universitaet Muenchen, Germany
Maximilian Neuner, Technische Universitaet Muenchen, Germany
Helmut Graeb, Technische Universitaet Muenchen, Germany
Error-free Near-threshold Adiabatic CMOS Logic in Presence of Process Variation
Yue Lu, University of Southampton, UK
Tom Kazmierski, University of Southampton, UK
Design of Spintronic MTJ and DW Based Content Addressable Memory
Rekha Govindaraj, University of South Florida, USA
Swaroop Ghosh, University of South Florida, USA
12:00PM ~ 13:00PM: Lunch
13:00PM ~ 14:30PM: Section III: Validation and Test
Chair: Zhuo Feng, Michigan Tech University, USA
Parametric Yield Beyond 99% (Invited)
Hongzhou Liu, Cadence, USA
BOLT: Efficient Test Stimulus Generation for Analog/RF Circuits Exploiting Analog Booleanization
Sabyasachi Deyati, Georgia Institute of Technology, USA
Barry Muldrey, Georgia Institute of Technology, USA
Abhijit Chatterjee, Georgia Institute of Technology, USA
Functional testing of large mixed-signal circuits with non-linear dynamics using pre-silicon knowledge
Parijat Mukherjee, Intel, USA
Peng Li, Texas A&M University, USA
14:30PM ~ 15:00PM: Break
15:00PM ~ 16:15PM: Session IV: Synthesis and Optimization
Chair: Lars Hedrich, Goethe University Frankfurt, Germany
PolyGP: Improving GP-Based Analog Optimization through Accurate High-Order Monomials and Semidefinite Relaxation
Ye Wang, UT Austin, USA
Constantine Caramanis, UT Austin, USA
Michael Orshansky, UT Austin, USA
Efficient Analog Circuit Optimization Using Sparse Regression and Error Margining
Mohamed Baker Alawieh, Carnegie Mellon University, USA
Fa Wang, Carnegie Mellon University, USA
Rouwaida Kanj, American University of Beirut, Lebanon
Xin Li, Carnegie Mellon University, USA
Analog Circuit Design Knowledge Mining and Reasoning-based Topology Synthesis
Fanshu Jiao, Stony Brook University, USA
Hao Li, Stony Brook University, USA
Alex Doboli, Stony Brook University, USA
16:15PM ~ 17:15PM: Panel: Automotive Electronics: The Future of IC?
Chair: Xin Li, Carnegie Mellon University, USA
Panelist:
LeRoy Winemberg, Freescale, USA
Hao Fang, Cadence, USA
Hillel Miller, Synopsys, USA
Mass Sivillotti, Mentor Graphics, USA
17:15PM ~ 18:00PM: Poster Session
November 6 (Friday)
8:00AM ~ 9:30AM: Session V: Verification and Validation
Chair: Scott Little, Intel, USA
Guided Analog Coverage Maximization Using State Space Analysis
Andreas Furtig, Goethe University Frankfurt, Germany
Lars Hedrich, Goethe University Frankfurt, Germany
A Workflow for the Design of Mixed-signal Systems with Asynchronous Control
Vladimir Dubikhin, Newcastle University, UK
Andrew Fisher, University of Utah, USA
Danil Sokolov, Newcastle University, UK
Chris Myers, University of Utah, USA
Alex Yakovlev, Newcastle University, UK
Defining a Functional Coverage Metric for Analog Models
Jiho Lee, Seoul National University, Korea
Jaeha Kim, Seoul National University, Korea
Co-Learning Bayesian Model Fusion: Efficient Performance Modeling of Analog and Mixed-Signal Circuits Using Side Information
Fa Wang, Carnegie Mellon University, USA
Manzil Zaheer, Carnegie Mellon University, USA
Xin Li, Carnegie Mellon University, USA
Jean-Olivier Plouchart, IBM, USA
Alberto Valdes-Garcia, IBM, USA
9:30AM ~ 10:00AM: Break
10:00AM ~ 11:30AM: Session VI: Security and Verification
Chair: Xin Li, Carnegie Mellon University, USA
Hardware Trojans in Wireless Cryptographic ICs (Invited)
Yiorgos Makris, UT Dallas, USA
EM-Based on-Chip Aging Sensor for Detection and Prevention of Recycled ICs
Kai He, UC Riverside, USA
Xin Huang, UC Riverside, USA
Sheldon X.-D. Tan, UC Riverside, USA
Deductive Inevitability Verification of Ring Oscillators using SOS-QE Approach
Hafiz Ul Asad, City University London, UK
Kevin D. Jones, Plymouth University, UK
11:30AM ~ 12:00PM: Feedback and Discussion