Thursday, November 7, 2019

9:00AM ~ 9:10AM:  Opening Remarks

9:10AM ~ 10:10AM:  Keynote
Chair: Xin Li, Duke University, USA

Flaws in Circuit Simulation
Ronald Rohrer, Southern Methodist University, USA

10:10AM ~ 10:30AM:  Break

10:30AM ~ 12:30AM:  Session I: Learning AMS Circuits
Chair: Xin Li, Duke University, USA

Machine Learning Based Parasitic Estimation for Analog Circuits
Chandramouli Kashyap, Intel, USA

Machine Learning Based Sub-Circuit Recognition for Analog and Mixed-Signal Design
Mark Po-Hung Lin, National Chiao Tung University, Taiwan

Iterative Testing and Learning Driven Mixed-Signal Design Validation and Diagnosis
Jun-Yang Lei, Georgia Institute of Technology, USA

Efficient Performance Trade-off Modeling for Analog Circuit based on Bayesian Neural Network
Jun Tao, Fudan University, China

12:30PM ~ 1:30PM:  Lunch

1:30PM ~ 2:15PM:  Keynote
Chair: Zheng Zhang, University of California, Santa Barbara,

Machine Learning for the Design/Manufacture Interface
Duane Boning, Massachusetts Institute of Technology, USA

2:15PM ~ 3:00PM:  Keynote
Chair: Zheng Zhang, University of California, Santa Barbara, USA

Toward Analog CAD Without Frontiers - In Memoriam Oded Maler
Thao Dang, University of Grenoble-Alpes France, France

3:00PM ~ 3:30PM:  Break

3:30PM ~ 5:30PM:  Session II: Simulation and Optimization of AMS Circuits
Chair: Xin Li, Duke University, USA

Fast and Accurate Transient Circuit Simulation with Step Function Excitation
Jiahua Li, Southern Methodist University, USA

UT-AnLay: A Dataset for Analog Post Layout Performance Modeling
Mingjie Liu, University of Texas at Austin, USA

Chance-Constrained Yield Optimization of Photonic IC with Non-Gaussian Correlated Process Variations
Chunfeng Cui, University of California, Santa Barbara, USA

Efficient Analog/Mixed-Signal Verification Using Bayesian Optimization in High Dimensional Space
Hanbin Hu, University of California, Santa Barbara, USA

5:30PM ~ 7:00PM:  Poster Session



Poster List

Unsupervised Root-Cause Analysis for Integrated Systems
Design, Modeling and Optimization of Resonant Gate Drive Based Fully-Integrated Buck Converters
Non-linear ADC Optimization Design for PIM Accelerators
Analog Time Domain Sensitivity Application for Fault Detection
Effective-Resistance Preserving Spectral Reduction of Graphs
An Efficient and Accurate Parasitic Interconnect Computation
Delayed Elmore Delay Analog Macromodeling of Digital Circuitry
Resource Estimation for SRAM Circuit Simulation Using Machine Learning
An Analog Layout Generator Based on Structure Recognition